UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 65

• Manufacturer Part Number: UPD70F3737GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3.3
a flash programmer is connected. In the self-programming mode, input a high level to this pin from an external circuit.
operation.
The V850ES/JG3-L has the following operation modes.
• Normal operation mode
• Flash memory programming mode
• Self programming mode
• On-chip debug mode
The operation mode is specified according to the status (input level) of the FLMD0 and FLMD1 pins.
To specify the normal operation mode, input a low level to the FLMD0 pin during the reset period.
A high level is input to the FLMD0 pin by the flash memory programmer in the flash memory programming mode if
Fix the specification of these pins in the application system and do not change the setting of these pins during
(1) Normal operation mode
(2) Flash memory programming mode
(3) Self programming mode
(4) On-chip debug mode
Operation Modes
The V850ES/JG3-L is provided with an on-chip debug function that employs the JTAG (Joint Test Action Group)
communication specifications.
For details, see CHAPTER 31 ON-CHIP DEBUG FUNCTION.
After the system has been released from the reset state, the pins related to the bus interface are set to the port
mode, execution branches to the reset entry address of the internal ROM, and instruction processing is started.
When this mode is specified, the internal flash memory can be programmed by using a flash programmer.
Data can be erased and written from/to the flash memory by using a user application program. For details,
see CHAPTER 30 FLASH MEMORY.
Remark
FLMD0
H
H
L
H: High level
L: Low level
×: don’t care
FLMD1
H
×
L
Normal operation mode
Flash memory programming mode
Setting prohibited
CHAPTER 3 CPU FUNCTION
User’s Manual U18953EJ5V0UD
Operation Mode
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