UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 98

• Manufacturer Part Number: UPD70F3737GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

96
Alternate-function mode
PMCn Register Setting
(1) Port n register (Pn)
The operation when writing or reading the Pn register differs depending on the specified mode.
Note The value written to the output latch is retained until a new value is written to the output latch.
(PMCnm bit = 0)
(PMCnm bit = 1)
Port mode
Data I/O with external devices is performed by writing to and reading from the Pn register. The Pn register is
made up of a port latch that retains the output data and a circuit that reads the pin status.
Each bit of the Pn register corresponds to one pin of port n and can be read or written in 1-bit units.
The output latch value is cleared by a reset.
After reset:
Pn
Note This value is undefined for input-only ports.
00H
Pnm
PMn Register Setting
Pn7
0
1
7
(PMnm bit = 0)
(PMnm bit = 1)
(PMnm bit = 0)
(PMnm bit = 1)
Note
Output mode
Output mode
Input mode
Input mode
(output latch)
0 is output.
1 is output.
Table 4-3. Reading and Writing Pn Register
Pn6
6
CHAPTER 4 PORT FUNCTIONS
User’s Manual U18953EJ5V0UD
Pn5
5
R/W
Control of output data (in output mode)
Write to the output latch
The contents of the output latch are output
from the pin.
Write to the output latch
The status of the pin is not affected.
Write to the output latch
The status of the pin is not affected.
The pin operates as an alternate-function
pin.
Write to the output latch
The status of the pin is not affected.
The pin operates as an alternate-function
pin.
Pn4
7
Writing Pn Register
Pn3
3
Note
Note
Note
Note
.
.
.
.
Pn2
2
Pn1
1
The value of the output
latch is read.
The pin status is read.
The value of the output
latch is read.
The pin status is read.
Pn0
Reading Pn Register
0