UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 299

• Manufacturer Part Number: UPD70F3737GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

TPnCTL0
TPnCTL1
TPnIOC0
• When TPnOL1 bit is 0:
(a) TMPn control register 0 (TPnCTL0)
(b) TMPn control register 1 (TPnCTL1)
(c) TMPn I/O control register 0 (TPnIOC0)
TOPn1 pin output
Notes 1. The setting of these bits is invalid when the TPnCTL1.TPnEEE bit is 1.
Remark
16-bit counter
TPnCE
0/1
0
0
2. Set this bit to 0 when not using the TOPn0 pin in the PWM output mode.
n = 0 to 5
TPnEST
0
0
0
Figure 7-46. Register Settings in PWM Output Mode (1/2)
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
TPnEEE
0/1
0
0
0
0
0
User’s Manual U18953EJ5V0UD
TPnOL1
0/1
0
0
TPnCKS2 TPnCKS1 TPnCKS0
TPnOE1 TPnOL0
TPnMD2 TPnMD1 TPnMD0
• When TPnOL1 bit is 1:
0/1
0/1
1
TOPn1 pin output
16-bit counter
0/1
0/1
Note 2
0
TPnOE0
0/1
0/1
Note 2
0
0: Disable TOPn0 pin output.
1: Enable TOPn0 pin output.
Output level when TOPn0
pin is disabled:
0: Low level
1: High level
0: Disable TOPn1 pin output.
1: Enable TOPn1 pin output.
Active level of TOPn1 pin
output:
0: High level
1: Low level
1, 0, 0:
PWM output mode
0: Operate TMPn on count
1: Increment TMPn based on
These bits select
the count clock
0: Stop counting.
1: Enable counting.
TPnCKS0 to TPnCKS2 bits.
clock selected by using
external event count input
signal.
Note 1
.
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