UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 820

• Manufacturer Part Number: UPD70F3737GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

818
(4) Noise elimination control register (NFC)
Remarks 1. Since sampling is performed three times, the reliably eliminated noise width is 2 sampling clock
Digital noise elimination can be selected for the INTP3 pin. The noise elimination settings are specified by
using the NFC register.
When digital noise elimination is selected, the sampling clock for digital sampling can be selected from f
f
Even when digital noise elimination is selected, using f
INTP3 interrupt request signal to release the IDLE1, IDLE2, and STOP modes.
This register can be read or written in 8-bit units.
Reset sets this register to 00H.
Caution After the sampling clock has been changed, it takes 3 sampling clock cycles to initialize the
XX
/128, f
2. In the case of noise with a width smaller than 2 sampling clock cycles, an interrupt request signal
XX
After reset: 00H
cycles.
is generated if noise synchronized with the sampling clock is input.
NFC
digital noise eliminator. Therefore, if an INTP3 valid edge is input within these 3 sampling
clock cycles after the sampling clock has been changed, an interrupt request signal may be
generated. Therefore, be careful about the following points when using the interrupt and
DMA functions.
• When using the interrupt function, after the 3 sampling clock cycles have elapsed, enable
• When using the DMA function (started by INTP3), enable DMA after 3 sampling clock
/256, f
CHAPTER 21 INTERRUPT SERVICING/EXCEPTION PROCESSING FUNCTION
interrupts after the interrupt request flag (PIC3.PIF3 bit) has been cleared.
cycles have elapsed.
XX
/512, f
NFEN
NFEN
NFC2
0
1
0
0
0
0
1
1
Other than above
XX
Analog noise elimination (60 ns (TYP.))
Digital noise elimination
/1,024, or f
R/W
NFC1
0
0
0
1
1
0
0
Address: FFFFF318H
XT
NFC0
User’s Manual U18953EJ5V0UD
. Sampling is performed three times.
0
0
1
0
1
0
1
Settings of INTP3 pin noise elimination
f
f
f
f
f
f
Setting prohibited
XX
XX
XX
XX
XX
XT
/64
/128
/256
/512
/1,024
(subclock)
0
XT
as the sampling clock makes it possible to use the
0
Digital sampling clock
NFC2
NFC1
NFC0
XX
/64,