UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 618

• Manufacturer Part Number: UPD70F3737GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17.6.10 Receive data noise filter
generator.
as the input data. Therefore, data not exceeding 1 clock cycle width is judged to be noise and is not delivered to the
internal circuit (see Figure 17-13). See 17.7 (1) (a) Base clock for details of the base clock.
delayed by 3 clocks in relation to the external signal status.
616
Base clock (f
This filter samples signals received via the RXDC0 pin using the base clock supplied by the dedicated baud rate
When the same sampling value is read twice, the match detector output changes and the RXDC0 signal is sampled
Moreover, since the circuit is as shown in Figure 17-15, the processing that goes on within the receive operation is
Internal signal A
Internal signal B
Internal signal C
RXDC0 (input)
RXDC0
Base clock
UCLK
CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC) (
)
In
Q
Figure 17-14. Timing of RXDC0 Signal Judged as Noise
Internal signal A
Figure 17-13. Noise Filter Circuit
User’s Manual U18953EJ5V0UD
Match
In
Q
(judged as noise)
Mismatch
Internal signal B
detector
Match
Match
PD70F3792, 70F3793)
In
LD_EN
Q
(judged as noise)
Mismatch
Internal signal C