UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 235

• Manufacturer Part Number: UPD70F3737GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(1) 16-bit counter
(2) TMPn counter read buffer register (TPnCNT)
(3) TMPn capture/compare registers 0 and 1 (TPnCCR0 and TPnCCR1)
(4) CCR0 buffer register
(5) CCR1 buffer register
(6) TMPn control registers 0 and 1 (TPnCTL0 and TPnCTL1)
(7) TMPn I/O control registers 0 to 2 (TPnIOC0 to TPnIOC2)
(8) TMPn option register 0 (TPnOPT0)
(9) Edge detector
This is a 16-bit counter that counts internal clocks and external events.
This counter can be read by using the TPnCNT register.
When the TPnCTL0.TPnCE bit is 0 and the counter is stopped, the counter value is FFFFH. If the TPnCNT
register is read at this time, 0000H is read.
Reset sets the TPnCE bit to 0, stopping the counter, and setting its value to FFFFH.
This is a read buffer register from which the value of the 16-bit counter can be read.
These registers can be used as either capture registers or compare registers, in accordance with the specified
mode.
This is a 16-bit compare register that compares the value of the 16-bit counter.
When the TPnCCR0 register is used as a compare register, the value written to the TPnCCR0 register is
transferred to the CCR0 buffer register. If the value of the 16-bit counter matches the value of the CCR0 buffer
register, a compare match interrupt request signal (INTTPnCC0) is generated.
The CCR0 buffer register cannot be read or written directly.
The CCR0 buffer register is cleared to 0000H after reset because the TPnCCR0 register is cleared to 0000H.
This is a 16-bit compare register that compares the value of the 16-bit counter.
When the TPnCCR1 register is used as a compare register, the value written to the TPnCCR1 register is
transferred to the CCR1 buffer register. If the count value of the 16-bit counter matches the value of the CCR1
buffer register, a compare match interrupt request signal (INTTPnCC1) is generated.
The CCR1 buffer register cannot be read or written directly.
The CCR1 buffer register is cleared to 0000H after reset because the TPnCCR1 register is cleared to 0000H.
These are 8-bit registers that control the operations of TMPn.
These are 8-bit registers that control the input and output of TMPn.
This is an 8-bit register that controls the specification of settings such as capture and compare.
This circuit detects the valid edges input to the TIPn0 and TIPn1 pins. No edge, rising edge, falling edge, or
both the rising and falling edges can be selected as the valid edge by using the TPnIOC1 and TPnIOC2
registers.
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
User’s Manual U18953EJ5V0UD
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