UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 218

• Manufacturer Part Number: UPD70F3737GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
6.3
216
(1) Processor clock control register (PCC)
Registers
The PCC register is a special register. Data can be written to this register only in combination of specific
sequences (see 3.4.7 Special registers).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 03H.
After reset: 03H
PCC
Notes1.
FRC
FRC
CLS
MFRC
MCK
CK3
0
0
0
0
0
0
0
1
Notes1, 2
0
1
0
1
0
1
0
1
Notes1, 2
2.
3. The CLS bit is a read-only bit.
4.
Note3
μ
When the FRC bit is set (to 1), the subclock stops oscillating
When return to the RTC backup mode, specify RTCBUMCTL0.
RBMSET (to 0) and then set the FRC bit (to 1) (
70F3793 ).
(
Used
Not used
Oscillation enabled
Oscillation stopped
Used (when ceramic/crystal resonator is used)
Not used (when external clock is used)
Main clock operation
Subclock operation
μ
PD70F3792, 70F3793 only
R/W
MCK
CK2
< >
PD70F3792, 70F3793 ).
0
0
0
0
1
1
1
×
CHAPTER 6 CLOCK GENERATOR
Address: FFFFF828H
MFRC
User’s Manual U18953EJ5V0UD
CK1
0
0
1
1
0
0
1
×
Use of main clock on-chip feedback resistor
Use of subclock on-chip feedback resistor
CLS
Main clock oscillator control
CK0
< >
Status of CPU clock (f
0
1
0
1
0
1
×
×
Note3
f
f
f
f
f
f
Setting prohibited
f
XX
XX
XX
XX
XX
XX
XT
CK3
< >
/2
/4
/8 (Initial value)
/16
/32
Clock selection (f
CK2
CPU
)
CK1
μ
CLK
PD70F3792,
/f
CPU
)
CK0
(1/2)