MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 169

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MC68HC711E20CFN2

Manufacturer Part Number
MC68HC711E20CFN2
Description
IC MCU 20K 2MHZ OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711E20CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
20KB (20K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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10.16 MC68L11E9/E20 Expansion Bus Timing Characteristics
Freescale Semiconductor
Num
1. V
2. Input clocks with duty cycles other than 50% affect bus performance. Timing parameters affected by input clock duty cycle
Where:
4a
4b
12
17
18
19
21
22
24
25
26
27
28
29
35
36
1
2
3
9
otherwise noted
are identified by (a) and (b). To recalculate the approximate bus timing values, substitute the following expressions in place
of 1/8 t
(a) (1–dc) × 1/4 t
(b) dc × 1/4 t
dc is the decimal value of duty cycle percentage (high time).
DD
Frequency of operation (E-clock frequency)
Cycle time
Pulse width, E low, PW
Pulse width, E high, PW
E and AS rise time
E and AS fall time
Address hold time
Non-multiplexed address valid time to E rise
Read data setup time
Read data hold time , max = t
Write data delay time, t
Write data hold time, t
Multiplexed address valid time to E rise
Multiplexed address valid time to AS fall
Multiplexed address hold time, t
Delay time, E to AS rise, t
Pulse width, AS high, PW
Delay time, AS to E rise, t
MPU address access time
MPU access time, t
Multiplexed address delay (Previous cycle MPU read)
= 3.0 Vdc to 5.5 Vdc, V
t
t
t
t
t
CYC
AV
AVM
ASL
ACCA
MAD
= PW
in the above formulas, where applicable:
= PW
= PW
= t
CYC
= t
ASD
CYC
EL
CYC
ASH
EL
–(t
+ 30 ns
–(PW
–(t
–70 ns
ASD
(2) (2)a
ASD
ACCE
EL
+ 80 ns)
DHW
(2)a
EL
DDW
+ 90 ns)
–t
Characteristic
SS
, t
EH
AVM
= PW
ASD
ASH
ASED
= 1/2 t
AH
(3)a
= 1/8 t
= 0 Vdc, T
= 1/2 t
= 1/8 t
) –t
= 1/8 t
MAD
(2)a
= 1/8 t
= 1/4 t
EH
= 1/8 t
(2)a
AHL
DSR
CYC
CYC
CYC
–t
M68HC11E Family Data Sheet, Rev. 5.1
CYC
CYC
DSR
= 1/8 t
–t
–25 ns
CYC
CYC
–30 ns
A
–30 ns
CYC
f
+ 70 ns
(1)
= T
–30 ns
–30 ns
–5 ns
–5 ns
CYC
L
(2)a
to T
(2)a
(2)a
–30 ns
(2)b
H
, all timing is shown with respect to 20% V
(2)b
MC68L11E9/E20 Expansion Bus Timing Characteristics
Symbol
PW
PW
PW
t
t
t
t
t
t
t
t
t
t
t
t
ASED
ACCA
ACCE
t
DDW
DHW
CYC
DSR
DHR
MAD
t
t
AVM
AHL
ASD
ASL
AH
f
AV
t
t
o
r
ASH
f
EH
EL
1000
Min
475
470
275
268
150
120
220
120
735
150
95
30
95
95
dc
0
1.0 MHz
Max
150
195
440
1.0
25
25
DD
and 70% V
Min
500
225
220
298
33
88
30
33
78
25
33
58
95
58
88
dc
0
2.0 MHz
Max
133
190
2.0
25
25
88
DD
, unless
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
169

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