MC68HC711E20CFN2

Manufacturer Part NumberMC68HC711E20CFN2
DescriptionIC MCU 20K 2MHZ OTP 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC711E20CFN2 datasheets
 

Specifications of MC68HC711E20CFN2

Core ProcessorHC11Core Size8-Bit
Speed2MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory Size20KB (20K x 8)Program Memory TypeOTP
Eeprom Size512 x 8Ram Size768 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCLead Free Status / RoHS StatusContains lead / RoHS non-compliant
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Table 4-2. Instruction Set (Sheet 6 of 7)
Mnemonic
Operation
Description
A – M – C ⇒ A
SBCA (opr)
Subtract with
Carry from A
B – M – C ⇒ B
SBCB (opr)
Subtract with
Carry from B
1 ⇒ C
SEC
Set Carry
1 ⇒ I
SEI
Set Interrupt
Mask
1 ⇒ V
SEV
Set Overflow
Flag
A ⇒ M
STAA (opr)
Store
Accumulator
A
B ⇒ M
STAB (opr)
Store
Accumulator
B
A ⇒ M, B ⇒ M + 1
STD (opr)
Store
Accumulator
D
STOP
Stop Internal
Clocks
SP ⇒ M : M + 1
STS (opr)
Store Stack
Pointer
IX ⇒ M : M + 1
STX (opr)
Store Index
Register X
IY ⇒ M : M + 1
STY (opr)
Store Index
Register Y
A – M ⇒ A
SUBA (opr)
Subtract
Memory from
A
B – M ⇒ B
SUBB (opr)
Subtract
Memory from
B
D – M : M + 1 ⇒ D
SUBD (opr)
Subtract
Memory from
D
SWI
Software
See Figure 3–2
Interrupt
A ⇒ B
TAB
Transfer A to B
A ⇒ CCR
TAP
Transfer A to
CC Register
B ⇒ A
TBA
Transfer B to A
TEST
TEST (Only in
Address Bus Counts
Test Modes)
CCR ⇒ A
TPA
Transfer CC
Register to A
TST (opr)
Test for Zero or
M – 0
Minus
Freescale Semiconductor
Addressing
Instruction
Mode
Opcode
Operand
A
IMM
82
ii
A
DIR
92
dd
A
EXT
B2
hh
ll
A
IND,X
A2
ff
A
IND,Y
18
A2
ff
B
IMM
C2
ii
B
DIR
D2
dd
B
EXT
F2
hh
ll
B
IND,X
E2
ff
B
IND,Y
18
E2
ff
INH
0D
INH
0F
INH
0B
A
DIR
97
dd
A
EXT
B7
hh
ll
A
IND,X
A7
ff
A
IND,Y
18
A7
ff
B
DIR
D7
dd
B
EXT
F7
hh
ll
B
IND,X
E7
ff
B
IND,Y
18
E7
ff
DIR
DD
dd
EXT
FD
hh
ll
IND,X
ED
ff
IND,Y
18
ED
ff
INH
CF
DIR
9F
dd
EXT
BF
hh
ll
IND,X
AF
ff
IND,Y
18
AF
ff
DIR
DF
dd
EXT
FF
hh
ll
IND,X
EF
ff
IND,Y
CD
EF
ff
DIR
18
DF
dd
EXT
18
FF
hh
ll
IND,X
1A
EF
ff
IND,Y
18
EF
ff
A
IMM
80
ii
A
DIR
90
dd
A
EXT
B0
hh
ll
A
IND,X
A0
ff
A
IND,Y
18
A0
ff
A
IMM
C0
ii
A
DIR
D0
dd
A
EXT
F0
hh
ll
A
IND,X
E0
ff
A
IND,Y
18
E0
ff
IMM
83
jj
kk
DIR
93
dd
EXT
B3
hh
ll
IND,X
A3
ff
IND,Y
18
A3
ff
INH
3F
INH
16
INH
06
INH
17
INH
00
INH
07
EXT
7D
hh
ll
IND,X
6D
ff
IND,Y
18
6D
ff
M68HC11E Family Data Sheet, Rev. 5.1
Instruction Set
Condition Codes
Cycles
S
X
H
I
N
Z
V
2
3
4
4
5
2
3
4
4
5
2
2
1
2
1
3
0
4
4
5
3
0
4
4
5
4
0
5
5
6
2
4
0
5
5
6
4
0
5
5
6
5
0
6
6
6
2
3
4
4
5
2
3
4
4
5
4
5
6
6
7
14
1
2
0
2
2
0
*
2
6
0
6
7
C
1
0
77