MC68HC711E20CFN2

Manufacturer Part NumberMC68HC711E20CFN2
DescriptionIC MCU 20K 2MHZ OTP 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC711E20CFN2 datasheets
 


Specifications of MC68HC711E20CFN2

Core ProcessorHC11Core Size8-Bit
Speed2MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory Size20KB (20K x 8)Program Memory TypeOTP
Eeprom Size512 x 8Ram Size768 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCLead Free Status / RoHS StatusContains lead / RoHS non-compliant
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Page 39/242

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Addr.
Register Name
$103E
Reserved
System Configuration Register
$103F
(CONFIG)
See page 43.
System Configuration Register
(3)
$103F
(CONFIG)
See page 43.
1. Can be written only once in first 64 cycles out of reset in normal modes or at any time during special modes.
2. MC68HC711E9 only
3. MC68HC811E2 only
Figure 2-7. Register and Control Bit Assignments (Sheet 6 of 6)
2.3.1 RAM and Input/Output Mapping
Hardware priority is built into RAM and I/O mapping. Registers have priority over RAM and RAM has
priority over ROM. When a lower priority resource is mapped at the same location as a higher priority
resource, a read/write of a location results in a read/write of the higher priority resource only. For example,
if both the register block and the RAM are mapped to the same location, only the register block will be
accessed. If RAM and ROM are located at the same position, RAM has priority.
The fully static RAM can be used to store instructions, variables, and temporary data. The direct
addressing mode can access RAM locations using a 1-byte address operand, saving program memory
space and execution time, depending on the application.
RAM contents can be preserved during periods of processor inactivity by two methods, both of which
reduce power consumption. They are:
1. In the software-based stop mode, the clocks are stopped while V
power supply current is directly related to operating frequency in CMOS integrated circuits, only a
very small amount of leakage exists when the clocks are stopped.
2. In the second method, the MODB/V
a second power supply.
device. Adjustments to the circuit must be made for devices that operate at lower voltages. Using
the MODB/V
pin may require external hardware, but can be justified when a significant amount
STBY
of external circuitry is operating from V
be held low whenever V
Interrupts.
Freescale Semiconductor
Bit 7
6
5
R
R
R
Read:
Write:
Reset:
0
0
0
Read:
EE3
EE2
EE1
Write:
Reset:
1
1
1
= Unimplemented
I = Indeterminate after reset
pin can supply RAM power from a battery backup or from
STBY
Figure 2-8
shows a typical standby voltage circuit for a standard 5-volt
. If V
is used to maintain RAM contents, reset must
DD
STBY
is below normal operating level. Refer to
DD
M68HC11E Family Data Sheet, Rev. 5.1
Memory Map
4
3
2
1
R
R
R
R
NOSEC
NOCOP
ROMON
0
U
U
1
EE0
NOSEC
NOCOP
1
U
U
1
R
= Reserved
U = Unaffected
powers the MCU. Because
DD
Chapter 5 Resets and
Bit 0
R
EEON
U
EEON
1
39