MC68HC711E20CFN2

Manufacturer Part NumberMC68HC711E20CFN2
DescriptionIC MCU 20K 2MHZ OTP 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC711E20CFN2 datasheets
 


Specifications of MC68HC711E20CFN2

Core ProcessorHC11Core Size8-Bit
Speed2MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory Size20KB (20K x 8)Program Memory TypeOTP
Eeprom Size512 x 8Ram Size768 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCLead Free Status / RoHS StatusContains lead / RoHS non-compliant
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Page 43/242

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2.3.3.1 System Configuration Register
The system configuration register (CONFIG) consists of an EEPROM byte and static latches that control
the startup configuration of the MCU. The contents of the EEPROM byte are transferred into static
working latches during reset sequences. The operation of the MCU is controlled directly by these latches
and not by CONFIG itself. In normal modes, changes to CONFIG do not affect operation of the MCU until
after the next reset sequence. When programming, the CONFIG register itself is accessed. When the
CONFIG register is read, the static latches are accessed. See
Programming and Erasure
for information on modifying CONFIG.
To take full advantage of the MCU’s functionality, customers can program the CONFIG register in
bootstrap mode. This can be accomplished by setting the mode pins to logic 0 and downloading a small
program to internal RAM. For more information, Freescale application note AN1060 entitled
Bootstrap Mode
has been included at the back of this document. The downloadable talker will consist of:
Bulk erase
Byte programming
Communication server
All of this functionality is provided by PCbug11 which can be found on the Freescale Web site at
http://www.freescale.com. For more information on using PCbug11 to program an E-series device,
Freescale engineering bulletin EB296 entitled
the M68HC11EVBU
has been included at the back of this document.
The CONFIG register on the 68HC11 is an EEPROM cell and must be
programmed accordingly.
Operation of the CONFIG register in the MC68HC811E2 differs from other devices in the M68HC11 E
series. See
Figure 2-10
and
Figure
Address: $103F
Bit 7
Read:
Write:
Resets:
Single chip:
0
Bootstrap:
0
Expanded:
0
Test:
0
U indicates a previously programmed bit. U(L) indicates that the bit resets to the logic level held in the latch prior to reset,
but the function of COP is controlled by the DISR bit in TEST1 register.
Figure 2-10. System Configuration Register (CONFIG)
Freescale Semiconductor
Programming MC68HC711E9 Devices with PCbug11 and
NOTE
2-11.
6
5
4
3
NOSEC
0
0
0
U
0
0
0
U
0
0
0
1
0
0
0
1
= Unimplemented
M68HC11E Family Data Sheet, Rev. 5.1
Memory Map
2.5.1 EEPROM and CONFIG
M68HC11
2
1
Bit 0
NOCOP
ROMON
EEON
U
1
U
U(L)
U
U
U
U
U
U(L)
U
U
43