MC68HC711E20CFN2

Manufacturer Part NumberMC68HC711E20CFN2
DescriptionIC MCU 20K 2MHZ OTP 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC711E20CFN2 datasheets
 


Specifications of MC68HC711E20CFN2

Core ProcessorHC11Core Size8-Bit
Speed2MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory Size20KB (20K x 8)Program Memory TypeOTP
Eeprom Size512 x 8Ram Size768 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCLead Free Status / RoHS StatusContains lead / RoHS non-compliant
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Page 142/242

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Timing Systems
9.5.2 Timer Interrupt Flag Register 2
Bits of this register indicate the occurrence of timer system events. Coupled with the four high-order bits
of TMSK2, the bits of TFLG2 allow the timer subsystem to operate in either a polled or interrupt driven
system. Each bit of TFLG2 corresponds to a bit in TMSK2 in the same position.
Address:
$1025
Bit 7
Read:
TOF
Write:
Reset:
0
= Unimplemented
Figure 9-22. Timer Interrupt Flag 2 Register (TFLG2)
Clear flags by writing a 1 to the corresponding bit position(s).
TOF — Timer Overflow Interrupt Flag
Set when TCNT changes from $FFFF to $0000
RTIF — Real-Time Interrupt Flag
The RTIF status bit is automatically set to 1 at the end of every RTI period. To clear RTIF, write a byte
to TFLG2 with bit 6 set.
PAOVF — Pulse Accumulator Overflow Interrupt Flag
Refer to
9.7 Pulse
Accumulator.
PAIF — Pulse Accumulator Input Edge Interrupt Flag
Refer to
9.7 Pulse
Accumulator.
Bits [3:0] — Unimplemented
Always read 0
9.5.3 Pulse Accumulator Control Register
Bits RTR[1:0] of this register select the rate for the RTI system. The remaining bits control the pulse
accumulator and IC4/OC5 functions.
Address:
$1026
Bit 7
Read:
DDRA7
Write:
Reset:
0
Figure 9-23. Pulse Accumulator Control Register (PACTL)
DDRA7 — Data Direction for Port A Bit 7
Refer to
Chapter 6 Parallel Input/Output (I/O)
PAEN — Pulse Accumulator System Enable Bit
Refer to
9.7 Pulse
Accumulator.
PAMOD — Pulse Accumulator Mode Bit
Refer to
9.7 Pulse
Accumulator.
142
6
5
4
3
RTIF
PAOVF
PAIF
0
0
0
0
6
5
4
3
PAEN
PAMOD
PEDGE
DDRA3
0
0
0
0
Ports.
M68HC11E Family Data Sheet, Rev. 5.1
2
1
Bit 0
0
0
0
2
1
Bit 0
I4/O5
RTR1
RTR0
0
0
0
Freescale Semiconductor