MC68HC711E20CFN2

Manufacturer Part NumberMC68HC711E20CFN2
DescriptionIC MCU 20K 2MHZ OTP 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC711E20CFN2 datasheets
 


Specifications of MC68HC711E20CFN2

Core ProcessorHC11Core Size8-Bit
Speed2MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory Size20KB (20K x 8)Program Memory TypeOTP
Eeprom Size512 x 8Ram Size768 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCLead Free Status / RoHS StatusContains lead / RoHS non-compliant
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Operating Modes and On-Chip Memory
The address, R/W, and AS signals are active and valid for all bus cycles, including accesses to internal
memory locations. The E clock is used to enable external devices to drive data onto the internal data bus
during the second half of a read bus cycle (E clock high). R/W controls the direction of data transfers. R/W
drives low when data is being written to the internal data bus. R/W will remain low during consecutive data
bus write cycles, such as when a double-byte store occurs.
Refer to
Figure
2-1.
The write enable signal for an external memory is the NAND of the E clock
and the inverted R/W signal.
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
AS
R/W
E
MCU
Figure 2-1. Address/Data Demultiplexing
2.2.3 Test Mode
Test mode, a variation of the expanded mode, is primarily used during Freescale’s internal production
testing; however, it is accessible for programming the configuration (CONFIG) register, programming
calibration data into electrically erasable, programmable read-only memory (EEPROM), and supporting
emulation and debugging during development.
2.2.4 Bootstrap Mode
When the MCU is reset in special bootstrap mode, a small on-chip read-only memory (ROM) is enabled
at address $BF00–$BFFF. The ROM contains a bootloader program and a special set of interrupt and
reset vectors. The MCU fetches the reset vector, then executes the bootloader.
Bootstrap mode is a special variation of the single-chip mode. Bootstrap mode allows special-purpose
programs to be entered into internal random-access memory (RAM). When bootstrap mode is selected
at reset, a small bootstrap ROM becomes present in the memory map. Reset and interrupt vectors are
30
NOTE
HC373
Q1
D1
D2
Q2
D3
Q3
D4
Q4
D5
Q5
D6
Q6
Q7
D7
Q8
D8
LE
OE
M68HC11E Family Data Sheet, Rev. 5.1
ADDR15
ADDR14
ADDR13
ADDR12
ADDR11
ADDR10
ADDR9
ADDR8
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
WE
OE
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
Freescale Semiconductor