MC68HC711E20CFN2

Manufacturer Part NumberMC68HC711E20CFN2
DescriptionIC MCU 20K 2MHZ OTP 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC11
MC68HC711E20CFN2 datasheets
 

Specifications of MC68HC711E20CFN2

Core ProcessorHC11Core Size8-Bit
Speed2MHzConnectivitySCI, SPI
PeripheralsPOR, WDTNumber Of I /o38
Program Memory Size20KB (20K x 8)Program Memory TypeOTP
Eeprom Size512 x 8Ram Size768 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCLead Free Status / RoHS StatusContains lead / RoHS non-compliant
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6.3 Port B
In single-chip or bootstrap modes, port B pins are general-purpose outputs. In expanded or special test
modes, port B pins are high-order address outputs.
Address:
$1004
Bit 7
Single-chip or bootstrap modes:
Read:
PB7
Write:
Reset:
0
Expanded or special test modes:
Read:
ADDR15
Write:
Reset:
0
Figure 6-3. Port B Data Register (PORTB)
6.4 Port C
In single-chip and bootstrap modes, port C pins reset to high-impedance inputs. (DDRC bits are set to 0.)
In expanded and special test modes, port C pins are multiplexed address/data bus and the port C register
address is treated as an external memory location.
Address:
$1003
Bit 7
Single-chip or bootstrap modes:
Read:
PC7
Write:
Reset:
Expanded or special test modes:
Read:
ADDR7
DATA7
Write:
Reset:
Figure 6-4. Port C Data Register (PORTC)
Address:
$1005
Bit 7
Read:
PCL7
Write:
Reset:
Figure 6-5. Port C Latched Register (PORTCL)
Freescale Semiconductor
6
5
4
3
PB6
PB5
PB4
PB3
0
0
0
0
ADDR14
ADDR13
ADDR12
ADDR11
0
0
0
0
6
5
4
3
PC6
PC5
PC4
PC3
Indeterminate after reset
ADDR6
ADDR5
ADDR4
ADDR3
DATA6
DATA5
DATA4
DATA3
Indeterminate after reset
6
5
4
3
PCL6
PCL5
PCL4
PCL3
Indeterminate after reset
M68HC11E Family Data Sheet, Rev. 5.1
2
1
Bit 0
PB2
PB1
PB0
0
0
0
ADDR10
ADDR9
ADDR8
0
0
0
2
1
Bit 0
PC2
PC1
PC0
ADDR2
ADDR1
ADDR0
DATA2
DATA1
DATA0
2
1
Bit 0
PCL2
PCL1
PCL0
Port B
99