MC68030CRC33C Freescale Semiconductor, MC68030CRC33C Datasheet - Page 307

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MC68030CRC33C

Manufacturer Part Number
MC68030CRC33C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68030CRC33C

Processor Type
M680x0 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
33MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
128
Package Type
PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
9
9-6
9.1 T R A N S L A T I O N
the base address of the top level table for the tree. The pointer tables and
the translation from a logical to a physical address. Translation tables for a
The general translation table structure supported by the MC68030 is a tree
tables contain the base addresses of other tables. Page descriptors can reside
The tables at the leaves of the tree are called page tables. Only a portion of
the translation table for the entire logical address space is required to be
that translates the logical addresses that the currently executing process(es)
As shown in Figure 9-4, the root pointer for a table is a descriptor that contains
selected descriptor points to the base of the appropriate page table, and the
formation for the page. A page descriptor can also reside in a pointer table
or even in a root pointer to define a contiguous block of pages. A two-level
segments of 1024 bytes each.
The M68030 uses the ATC and translation tables stored in memory to perform
structure of tables. The pointer tables form the branches of the tree. These
in pointer tables and, in that case, are called early termination descriptors.
resident in memory at any time: specifically, only the portion of the table
use(s) must be resident. Portions of translation tables can be dynamically
allocated as the process requires additional memory.
page tables also consist of descriptors. A descriptor in a pointer table typically
contains the base address of a table at the next level of the tree. A table
descriptor can also contain limits for the index into the next table, protection
information, and history information pertaining to the descriptor. Each table
is indexed by a field extracted from the logical address. In the example shown
in Figure 9-4, the A field of the logical address, $00A, is added to the root
pointer value to select a descriptor at the A level of the translation tree. The
B field of the logical address ($006) is added to this base address to select
a descriptor within the page table. A descriptor in a page table contains the
physical base address of the page, protection information, and history in-
page task is shown. The 32-bit logical address space is divided into 4096
Figure 9-5 shows a possible layout of this example translation tree in memory.
program are loaded into memory by the operating system.
T A B L E S T R U C T U R E
MC68030 USER'S MANUAL
MOTOROLA

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