MC68030CRC33C Freescale Semiconductor, MC68030CRC33C Datasheet - Page 34

• Manufacturer Part Number: MC68030CRC33C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030CRC33C

• Processor Type: M680x0 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

M O T O R O L A
The supervisor programming model consists of the registers available to the
The user programming model remains unchanged from previous M68000
the user programming model and is used exclusively bythe MC68030 system
transparent translation feature of the MC68030 is newto the family supervisor
Figure 1-2 shows the user programming model, consisting of 16 32-bit
general-purpose registers and two control registers:
user plus 14 control registers:
programmers who utilize the supervisor privilege level to implement sen-
sitive operating system functions, I/O control, and memory management
subsystems. The supervisor programming model contains all the controls to
access and enable the special features of the MC68030. This segregation was
carefully planned so that all application software is written to run at the
system programmers when ported to a new design, the control features are
Family microprocessors. The supervisor programming model supplements
nonprivileged user level and migrates to the MC68030 from any M68000
platform without modification. Since system software is usually modified by
properly placed in the supervisor programming model. For example, the
programming model for the MC68030 and the two translation registers are
• General-Purpose 32-Bit Registers (D0-D7, A0-A7)
• 32-Bit Program Counter (PC)
• 8-Bit Condition Code Register (CCR)
• Two 32-Bit Supervisor Stack Pointers (ISP and MSP)
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•
•
•
•
•
•
• 32-Bit
• 32-Bit
•
32-Bit
32-Bit
32-Bit
32-Bit
64-Bit
64-Bit
16-Bit
16-Bit
Alternate Function Code Registers (SFC and DFC)
Vector Base Register (VBR)
Cache Control Register (CACR)
Translation Control Register (TC)
Transparent Translation Registers (TT0 and TT1)
Status Register (SR)
Cache Address Register (CAAR)
CPU Root Pointer (CRP)
Supervisor Root Pointer (SRP)
MMU Status Register (MMUSR)
M C 6 8 0 3 0 U S E R ' S M A N U A L
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