MC68030CRC33C Freescale Semiconductor, MC68030CRC33C Datasheet - Page 383

• Manufacturer Part Number: MC68030CRC33C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030CRC33C

• Processor Type: M680x0 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

9
9-82
9.10.3 Bus Error Handler Routine
When the PTEST instruction returns the invalid status, the bus error is a page
that took the exception was trying to access a page that has not been allo-
The routine that processes bus error exceptions is the most critical part of
the memory management services provided by the example operating sys-
tem. This routine must determine the validity of page faults and perform the
When the PTEST instruction does not find any error, the bus error was most
system must respond appropriately.
The table search performed by the PTEST instruction may end in a bus error
termination. Either the address translation tables are not correctly built or
A supervisor protection violation or a write protection violation usually in-
of the virtual address space that is not part of the task's address space. The
operating system usually recovers from such an error by terminating (abort-
fault, and the operating system must identify the specific type of page fault.
When the limit violation bit returned by the PTEST instruction is set, the task
cated. The example system aborts the task in this case. In other systems,
this is an implicit request for more virtual memory, particularly ifthe reference
When no limit violation occurred, a descriptor is invalid. Typically, the de-
the task was attempting to access unallocated virtual memory, and the system
When the software flags indicate that the descriptor corresponds to an un-
virgin page (allocated, but not yet accessed) and the request for the page
necessary processing. It must identify the conditions that aborted the exe-
cuting task. The PTEST instruction can investigate the cause of a bus error
by performing a table search using the address and type of access that
produced the error, accumulating status information during the search.
likely a malfunction (for example, a transient memory failure). The operating
main memory has failed (either a transient or permanent failure).
dicates that the task generating the exception attempted to access an area.
ing) the task.
is in a stack area.
scriptor contains software flags that provide relevant information. The ex-
ample operating system checks to see if the invalid descriptor is in an upper
level or a lower level table. When the descriptor is in the upper level table,
aborts the task. When the descriptor is in a lower level table, the system
checks software flags to identify the invalid descriptor.
allocated page, the system aborts the task. When the descriptor refers to a
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