MC68030CRC33C Freescale Semiconductor, MC68030CRC33C Datasheet - Page 443

• Manufacturer Part Number: MC68030CRC33C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030CRC33C

• Processor Type: M680x0 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

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10.4.18 Take Pre-lnstruction Exception Primitive
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the status register contains 01) when the coprocessor instruction begins to
the transfer of the status register to main processor take effect on execution
The take pre-instruction exception primitive initiates exception processing
tion exception stack frame format. This primitive applies to general and con-
ditional category instructions. Figure 10-40 shows the format of the take pre-
The MC68030 discards any instruction words that have been prefetched be-
yond the current scanPC location when this primitive is issued with DR=I
from the scanPC address in the address space indicated bythe status register
execute and if this primitive is issued with DR = 1 (from coprocessor to main
ception occurs when the coprocessor signals that it has completed all pro-
cessing associated with the instruction. Changes in the trace modes due to
of the next instruction.
using a coprocessor-supplied exception vector number and the pre-instruc-
instruction exception primitive.
(transfer to main processor). The MC68030 then refills the instruction pipe
S bit.
If the MC68030 is operating in the trace on change of flow mode (TI:T0 in
processor), the MC68030 prepares to take a trace exception. The trace ex-
The primitive uses the PC bit as previously described. Bits [0-7] contain the
exception vector number used by the main processor to initiate exception
When the main processor receives this primitive, it acknowledges the co-
fer to 10.3.2 Control ClR) to the control CIR. The MC68030 then proceeds with
QUENCE. The vector number for the exception is taken from bits [0-7] of the
processing.
processor exception request by writing an exception acknowledge mask (re-
exception processing as described in 8.1 EXCEPTION PROCESSING SE-
primitive, and the MC68030 uses the four-word stack frame format shown in
Figure 10-41.
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Figure 10-40. Take Pre-lnstruction Exception Primitive Format
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MC68030 USER'S MANUAL
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MOTOROLA
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