MC68030CRC33C Freescale Semiconductor, MC68030CRC33C Datasheet - Page 569

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MC68030CRC33C

Manufacturer Part Number
MC68030CRC33C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68030CRC33C

Processor Type
M680x0 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
33MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
128
Package Type
PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
12
12-44
/*
/**
/**
/*
/*
/*
/*
/*
/*
/*
/*
/*
PIN 4
PIN 6
PIN 8
PIN 1
PIN 2
PIN 3
PIN 5
PIN 7
PIN 9
PIN 19
PIN 18
PIN 17
PIN 16
PIN 15
PIN 14
PIN 13
PIN 12
To supply a solid power supply interface, 10 Vcc pins and 14 GND pins are
to provide for instantaneous current requirements, common capacitive de-
tween these devices and the MC68030 be minimized to provide sufficiently
f a s t r e s p o n s e t i m e t o s a t i s f y m o m e n t a r y
provided. This allows two VCC and four GND pins to supply power for the
address bus and two VCC and four GND pins to supply the data bus; the
remaining VCC and GND pins are used by the internal logic and clock gen-
eration circuitry. Table 12-7 lists the VCC and GND pin assignments.
To reduce the amount of noise in the power supplied to the MC68030 and
coupling techniques should be observed. While there is no recommended
layout for this capacitive decoupling, it is essential that the inductance be-
the internal PAL flip flop.
Allowable Target Device Types : PAL16R6D High Speed PAL
This device generates a sampling signal for tracing processor activity on
an instruction level basis for the MC68030. In the pin definitions and
equations listed below the following symbols are used:
In addition, the '.d' extension on signal names refers to the 'D' input of
Inputs
Outputs
= PHALT
=
= DSACK
= !AS
= SAMPLE
=
= IE
= sc
= secs
= CLKOUT
= clk
= CLK
= !RESET
= [STATUSQ
= !REFILLQ
= !ECSQ
= ISTERMQ
**/
**/
EP
FILL
Figure 12-24. PAL Pin Definitions
MC68030 USER'S MANUAL
Symbol
#
&
!
Definition
Logical NOT
Logical OR
Logical AND
/* same as p i n 3 C L K
/* Data Strobe Acknowledge
/* MPU Clock Signal
/* Address Strobe
/* System Reset Signal
/* Latched STATUS Signal
/* Latched REFILL Signal
/* Latched ECS Signal
/* Latched STERM Signal
/* Sample Signal
/* Processor Halted
/* REFILL received
/* Exception Pending
/* Instruction Executed
/* status complete
/* sampled ECS signal
/* Delayed CLK Signal
c u r r e n t d e m a n d s
a n d t o m a i n t a i n
MOTOROLA
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/

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