DS2196 Dallas Semiconducotr, DS2196 Datasheet - Page 106

• Manufacturer Part Number: DS2196
• Description: T1 Dual Framer LIU
• Manufacturer: Dallas Semiconducotr

HSRA: HDLC STATUS REGISTER FRAMER A (Address = 01 Hex)
HSRB: HDLC STATUS REGISTER FRAMER B (Address = A1 Hex)
NOTE:
The RBOC, RPE, RPS, and TMEND bits are latched and will be cleared when read.
(MSB)
RBOC
SYMBOL
TMEND
RHALF
THALF
RBOC
RNE
RPE
TNF
RPS
RPE
POSITION
HSR.4
HSR.7
HSR.6
HSR.5
HSR.3
HSR.2
HSR.1
HSR.0
RPS
NAME AND DESCRIPTION
Receive BOC Detector Change of State. Set whenever the
BOC detector sees a change of state from a BOC Detected to a
No Valid Code seen or vice versa. The setting of this bit
prompt the user to read the RBOC register for details.
Receive Packet End. Set when the HDLC controller detects
either the finish of a valid message (i.e., CRC check complete)
or when the controller has experienced a message fault such as
a CRC checking error, or an overrun condition, or an abort has
been seen. The setting of this bit prompts the user to read the
RHIR register for details.
Receive Packet Start. Set when the HDLC controller detects
an opening byte. The setting of this bit prompts the user to
read the RHIR register for details.
Receive FIFO Half Full. Set when the receive 64–byte FIFO
fills beyond the half waypoint. The setting of this bit prompts
the user to read the RHIR register for details.
Receive FIFO Not Empty. Set when the receive 64–byte
FIFO has at least one byte available for a read. The setting of
this bit prompts the user to read the RHIR register for details.
Transmit FIFO Half Empty. Set when the transmit 64–byte
FIFO empties beyond the half waypoint. The setting of this bit
prompts the user to read the THIR register for details.
Transmit FIFO Not Full. Set when the transmit 64–byte
FIFO has at least one byte available. The setting of this bit
prompts the user to read the THIR register for details.
Transmit Message End. Set when the transmit HDLC
controller has finished sending a message. The setting of this
bit prompts the user to read the THIR register for details.
RHALF
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RNE
THALF
TNF
TMEND
(LSB)
DS2196