DS2196 Dallas Semiconducotr, DS2196 Datasheet - Page 28

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DS2196

Manufacturer Part Number
DS2196
Description
T1 Dual Framer LIU
Manufacturer
Dallas Semiconducotr
Datasheet

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The factory in testing the DS2196 uses the two Test Registers at addresses 09 and 7D hex. On power–up,
the Test Registers should be set to 00 hex in order for the DS2196 to operate properly.
RCR1A: RECEIVE CONTROL REGISTER 1 FRAMER A (Address = 2B Hex)
LCVCRF
(MSB)
SYMBOL
RESYNC
LCVCRF
SYNCC
SYNCT
SYNCE
OOF1
OOF2
ARC
ARC
POSITION
RCR1A.7
RCR1A.6
RCR1A.5
RCR1A.4
RCR1A.3
RCR1A.2
RCR1A.1
RCR1A.0
OOF1
NAME AND DESCRIPTION
Line Code Violation Count Register Function Select.
0 = do not count excessive 0’s
1 = count excessive 0’s
Auto Resync Criteria.
0 = Resync on OOF or RCL event
1 = Resync on OOF only
Out Of Frame Select 1.
0 = 2/4 frame bits in error
1 = 2/5 frame bits in error
Out Of Frame Select 2.
0 = follow RCR1.5
1 = 2/6 frame bits in error
Sync Criteria.
In D4 Framing Mode.
0 = search for Ft pattern, then search for Fs pattern
1 = cross couple Ft and Fs pattern
In ESF Framing Mode.
0 = search for FPS pattern only
1 = search for FPS and verify with CRC6
Sync Time.
0 = qualify 10 bits
1 = qualify 24 bits
Sync Enable.
0 = auto resync enabled
1 = auto resync disabled
Resync. When toggled from low to high, a resynchronization
of the receive side framer is initiated. Must be cleared and set
again for a subsequent resync.
OOF2
28 of 157
SYNCC
SYNCT
SYNCE
RESYNC
(LSB)
DS2196

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