DS2196 Dallas Semiconducotr, DS2196 Datasheet - Page 48

• Manufacturer Part Number: DS2196
• Description: T1 Dual Framer LIU
• Manufacturer: Dallas Semiconducotr

(MSB)
RJC
SYMBOL
MECU
EAMS
RCM4
RCM3
RCM2
RCM1
RCM0
RJC
EAMS
POSITION
CCR6B.7
CCR6B.6
CCR6B.5
CCR6B.4
CCR6B.3
CCR6B.2
CCR6B.1
CCR6B.0
MECU
NAME AND DESCRIPTION
Receive Japanese CRC6 Enable.
0 = use ANSI/AT&T/ITU CRC6 calculation (normal operation)
1 = use Japanese standard JT–G704 CRC6 calculation
Error Accumulation Mode Select.
0 = CCR3B.2 determines accumulation time
1 = CCR6B.5 determines accumulation time
Manual Error Counter Update. When enabled by CCR6B.6,
the changing of this bit from a 0 to a 1 allows the next clock
cycle to load the error counter registers with the latest counts
and reset the counters. The user must wait a minimum of 972
ns (1.5 clock periods) before reading the error count registers to
allow for proper update.
Receive Channel Monitor Bit 4. MSB of a channel decode
that determines which receive channel data will appear in the
RDS0M register. See Section 10 for details.
Receive Channel Monitor Bit 3.
Receive Channel Monitor Bit 2.
Receive Channel Monitor Bit 1.
Receive Channel Monitor Bit 0. LSB of the channel decode.
RCM4
48 of 157
RCM3
RCM2
RCM1
RCM0
(LSB)
DS2196