DS2196 Dallas Semiconducotr, DS2196 Datasheet - Page 18

• Manufacturer Part Number: DS2196
• Description: T1 Dual Framer LIU
• Manufacturer: Dallas Semiconducotr

Signal Type:
This digital output will provide either a frame synchronization pulse or the negative half of a bipolar data stream.
The signal is based on what is provided at the TNEGLI input.
Signal Name:
Signal Description:
Signal Type:
This digital output will provide either a NRZ data stream or the positive half of a bipolar data stream. The signal is
based on what is provided at the TPOSLI input.
Signal Name:
Signal Description:
Signal Type:
This digital output provides the 1.544 MHz transmit LIU clock. The signal is based on what is provided at the
TCLKLI input.
Signal Name:
Signal Description:
Signal Type:
This digital input is used to pass either the negative half of a bipolar data stream or a frame synchronization pulse
via the jitter attenuator block to the transmit line driver block and the LFSYNC output pin. Data input to this pin is
sampled on the falling edge of TCLKLI. TNEGLI can be internally connected to TNEGOA/TFSYNCA via the
CCR4A.2 control bit.
Signal Name:
Signal Description:
Signal Type:
This digital input is used to pass either the positive half of a bipolar data stream or a NRZ data stream via the jitter
attenuator block to the transmit line driver block and the LNRZ output pin. Data input to this pin is sampled on the
falling edge of TCLKLI. TPOSLI can be internally connected to TPOSOA/TNRZA via the CCR4A.2 control bit.
Signal Name:
Signal Description:
Signal Type:
This digital input is used to pass a 1.544 MHz clock via the jitter attenuator block to the transmit line driver block
and the LCLK output pin. TCLKLI can be internally connected to TCLKOA via the CCR4A.2 control bit.
Signal Name:
Signal Description:
Signal Type:
This digital input is used to pass a NRZ data stream via the Data Source Selection MUX and the jitter attenuator
block to the RPOSLO and RNEGLO output pins. Data input to this pin is sampled on the falling or rising edge of
WCLK.
Signal Name:
Signal Description:
Signal Type:
This digital input is used to pass a 1.544 MHz clock via the Data Source Selection MUX and the jitter attenuator
block to the RCLKLO output pin.
Output
LNRZ
LIU NRZ Data
Output
LCLK
LIU Clock
Output
TNEGLI
Transmit Negative Data for the LIU
Input
TPOSLI
Transmit Positive Data for the LIU
Input
TCLKLI
Transmit Clock for the LIU
Input
WNRZ
Working NRZ Data
Input
WCLK
Working Clock
Input
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