ST7FMC1K2B3 STMICROELECTRONICS [STMicroelectronics], ST7FMC1K2B3 Datasheet - Page 102

• Manufacturer Part Number: ST7FMC1K2B3
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST7MC1xx/ST7MC2xx
SERIAL PERIPHERAL INTERFACE (cont’d)
10.4.5.4
Configurations
There are two types of SPI systems:
– Single Master System
– Multimaster System
Single Master System
A typical single master system may be configured
using a device as the master and four devices as
slaves (see
The master device selects the individual slave de-
vices by using four pins of a parallel port to control
the four SS pins of the slave devices.
The SS pins are pulled high during reset since the
master device ports will be forced to be inputs at
that time, thus disabling the slave devices.
Note: To prevent a bus conflict on the MISO line,
the master allows only one active slave device
during a transmission.
Figure 61. Single Master / Multiple Slave Configuration
102/309
1
5V
Single
Figure
MOSI
SCK
SS
SCK
MOSI
Device
Master
Device
Slave
61).
Master
MISO
MISO
SS
and
Multimaster
MOSI
SCK
Device
Slave
MISO
SS
For more security, the slave device may respond
to the master with the received data byte. Then the
master will receive the previous byte back from the
slave device if all MISO and MOSI pins are con-
nected and the slave has not written to its SPIDR
register.
Other transmission security methods can use
ports for handshake lines or data bytes with com-
mand fields.
Multimaster System
A multimaster system may also be configured by
the user. Transfer of master control could be im-
plemented using a handshake method through the
I/O ports or by an exchange of code messages
through the serial peripheral interface system.
The multimaster system is principally handled by
the MSTR bit in the SPICR register and the MODF
bit in the SPICSR register.
MOSI
SCK
Device
Slave
MISO
SS
MOSI
SCK
Device
Slave
MISO
SS