ST7FMC1K2B3 STMICROELECTRONICS [STMicroelectronics], ST7FMC1K2B3 Datasheet - Page 272

• Manufacturer Part Number: ST7FMC1K2B3
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST7MC1xx/ST7MC2xx
COMMUNICATION INTERFACE CHARACTERISTICS (Cont’d)
Figure 148. SPI Slave Timing Diagram with CPHA=1
Figure 149. SPI Master Timing Diagram
Notes:
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave mode) has
its alternate function capability released. In this case, the pin status depends of the I/O port configuration.
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MISO
MOSI
MISO
MOSI
SS
CPHA=1
CPOL=0
CPHA=1
CPOL=1
SS
OUTPUT
INPUT
CPHA = 0
CPOL = 0
CPHA = 0
CPOL = 1
CPHA = 1
CPOL = 0
CPHA = 1
CPOL = 1
INPUT
OUTPUT
INPUT
INPUT
see
note 2
See note 2
t
a(SO)
t
su(SS)
HZ
t
t
t
su(MI)
w(SCKH)
w(SCKL)
t
su(SI)
MSB OUT
MSB IN
MSB OUT
t
MSB IN
h(MI)
t
h(SI)
t
1)
c(SCK)
t
c(SCK)
t
t
t
v(MO)
w(SCKH)
w(SCKL)
t
v(SO)
DD
and 0.7xV
BIT6 OUT
BIT6 IN
BIT6 OUT
1)
DD
.
BIT1 IN
t
h(MO)
t
h(SO)
t
t
r(SCK)
f(SCK)
t
t
r(SCK)
f(SCK)
LSB OUT
LSB IN
LSB OUT
LSB IN
t
h(SS)
See note 2
t
dis(SO)
note 2
see