ST7FMC1K2B3 STMICROELECTRONICS [STMicroelectronics], ST7FMC1K2B3 Datasheet - Page 303

• Manufacturer Part Number: ST7FMC1K2B3
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

IMPORTANT NOTES (Cont’d)
Impact on application
Software may execute the interrupt routine twice
after header reception.
Moreover, in reception mode, as the receiver is no
longer in mute mode, an interrupt will be generat-
ed on each data byte reception.
Figure 169. LINSCI Interrupt routine
15.5 MISSING DETECTION OF BLDC “Z
EVENT”
For a BLDC drive, the Dead Time generator is en-
abled through the MDTG register (PCN=0 and
DTE=1). If the duty cycle of the PWM signal gen-
erated to drive the motor is lower than the pro-
grammed deadtime, the Z event sampling will be
missing.
Workaround
The complementary PWM must be disabled by re-
setting the DTE bit in the MDTG register (see
221).
As the current in the motor is very low in this case,
the MOSFET body diode can be used.
@interrupt void LINSCI_IT ( void ) /* LINSCI interrupt routine */
{
}
/* clear flags */
SCISR_buffer = SCISR;
SCIDR_buffer = SCIDR;
if ( SCISR_buffer & LHE )/* header error ? */
{
}
if (!LHLR)/* header time-out? */
{
}
{
}
if ( !(SCICR2 & RWU) )/* active mode ? */
SCISR;
SCIDR;/* Clear RDRF flag */
SCICR2 |= RWU;/* set mute mode */
SCISR;
SCIDR;/* Clear RDRF flag */
SCICR2 |= RWU;/* set mute mode */
_asm("rim");/* enable interrupts */
_asm("sim");/* disable interrupts */
page
Workaround
The problem can be detected in the LINSCI inter-
rupt routine. In case of timeout error (LHE is set
and LHLR is loaded with 00h), the software can
check the RWU bit in the SCICR2 register. If RWU
is cleared, it can be set by software. Refer to
ure
15.6 INJECTED CURRENT ON PD7
On rev.B silicon, the parameter Iinj(pin), injected
current on I/O pins (see
264), is limited at 0 (instead of -2mA) for the pin
PD7. This limitation is no longer present on rev.C
and A silicon and all I/O pins have the max values
+5/-2 mA.
15.7 RESET VALUE OF UNAVAILABLE PINS
On A silicon versions, some ports (Ports A, C and
E) have less than 8 pins. The bits associated to the
unavailable pins must always be kept at reset
state.
169. Workaround is shown in bold characters.
Example using Cosmic compiler syntax
ST7MC1xx/ST7MC2xx
section 12.8.1 on page
303/309
Fig-