ST7FMC1K2B3 STMICROELECTRONICS [STMicroelectronics], ST7FMC1K2B3 Datasheet - Page 258

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ST7FMC1K2B3

Manufacturer Part Number
ST7FMC1K2B3
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
ST7MC1xx/ST7MC2xx
CLOCK AND TIMING CHARACTERISTICS (Cont’d)
12.5.4 Clock Security System with PLL
Table 88. PLL Characteristics
Table 89. Clock Detector Characteristics
Notes:
1. Data based on characterization results, not tested in production.
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f
Output Frequency
t
Jitter
f
f
t
t
OSC
Lock
CPU
Detect
setup
hold
Symbol
Symbol
PLL input frequency range
Output frequency when the PLL attain lock.
PLL Lock Time (LOCKED = 1)
Jitter in the output clock
CPU clock frequency when VCO is con-
nected to ground (ICD internal clock or
back up oscillator )
Detected Minimum Input Frequency
Time needed to detect OSCIN once CKD is
enabled
Time needed to detect that OSCIN stops
Parameter
Parameter
Min
Min
7
Typ
Typ
16
50
2
3
3
3
500
Max
Max
100
8
1)
MHz
MHz
MHz
Unit
Unit
KHz
μs
μs
μs
%

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