ST7FMC1K2B3 STMICROELECTRONICS [STMicroelectronics], ST7FMC1K2B3 Datasheet - Page 264

• Manufacturer Part Number: ST7FMC1K2B3
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST7MC1xx/ST7MC2xx
12.8 I/O PORT PIN CHARACTERISTICS
12.8.1 General Characteristics
Subject to general operating conditions for V
Notes:
1. Data based on characterization results, not tested in production.
2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
3. I
respected, the injection current must be limited externally to the I
while a negative injection is induced by V
Refer to
4. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for
example or an external pull-up or pull-down resistor (see
based on design simulation and technology characteristics, not tested in production. This value depends on V
perature values.
5. The R
scribed in
6. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external
interrupt source.
264/309
ΣI
I
Symbol
INJ(PIN)
t
t
t
INJ(PIN)
r(IO)out
f(IO)out
w(IT)in
INJ(PIN)
V
V
R
C
V
V
V
V
I
I
hys
hys
PU
)
S
IH
IH
L
IO
IL
IL
3)
section 12.2.2 on page 248
PU
3
Figure
must never be exceeded. This is implicitly insured if V
pull-up equivalent resistor is based on a resistive transistor (corresponding I
Input low level voltage
Input high level voltage
Schmitt trigger voltage hysteresis
Input low level voltage
Input high level voltage
Schmitt trigger voltage hysteresis
Injected Current on an I/O
Total injected current (sum of all I/O
and control pins)
Input leakage current
Static current consumption induced
by each floating input pin
Weak pull-up equivalent resistor
I/O pin capacitance
Output high to low level fall time
Output low to high level rise time
External interrupt pulse time
139). This data is based on characterization results, tested in production at V
Parameter
for more details. For PD7, refer to ‘INJECTED CURRENT ON PD7” on
4)
6)
IN
<V
1)
5)
1)
SS
2)
2)
.
CMOS ports
G & H ports
V
V
Floating input mode
V
C
Between 10% and 90%
DD
DD
SS
IN
L
=50pF
=
≤
=5V
V
, f
V
IN
SS
OSC
Figure
Conditions
≤
V
DD
, and T
138). Static peak current value taken at a fixed V
INJ(PIN)
IN
maximum is respected. If V
A
unless otherwise specified.
value. A positive injection is induced by V
0.7xV
Min
2.8
50
1
DD
PU
Typ
400
200
90
25
25
1
5
current characteristics de-
DD
IN
max.
maximum cannot be
0.3xV
+5/-2
Max
± 25
250
0.8
±1
DD
DD
page
and tem-
IN
IN
t
Unit
mV
mA
CPU
μA
pF
kΩ
ns
value,
V
V
V
>V
303.
DD