ST7FMC1K2B3 STMICROELECTRONICS [STMicroelectronics], ST7FMC1K2B3 Datasheet - Page 188

• Manufacturer Part Number: ST7FMC1K2B3
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST7MC1xx/ST7MC2xx
MOTOR CONTROLLER (Cont’d)
10.6.8.5 Current feedback amplifier
In both current and voltage mode, the current
feedback from the motor can be amplified before
entering the comparator. This is done by an inte-
grated Op-amp that can be used when the OAON
bit is set in the OACSR register and the CFAV bit
in the MREF register is reset. This allows the three
points of the Op-amp to be accessed for a pro-
grammable gain. The CFAV bit in the MREF regis-
ter selects the MCCFI0 or OAZ(MCCFI1) pin as
the comparator input as shown in the following ta-
ble.
Table 46. Comparator input selection
If the amplifier is not used for current feedback, it
can be used for other purposes. In this case, the
OAON bit in the OACSR register and the CFAV bit
in the MREF register both have to be set. This
Figure 106. Current Feedback
188/309
1
V
CFAV bit
DD
R
R
(V)
1ext
2ext
0
1
MCPWMU/V/W
(I)
C
(MCCFI1)
EXT
MCCFI0
MCCREF
Select MCCFI0 as the current compara-
OAN
OAP
OAZ
Select OAZ(MCCFI1) as the current
12-bit PWM generator/Compare U
Sampling frequency
Internal clock
MREF Register
PWME[U:V:W] bit
OAON bit
Register
OACSR
ADC
+
-
comparator input
Power down mode
V
CREF
Meaning
tor input
V
MAX = V
CFAV bit
Register
MCRA Register
CREF
MREF
V0C1 bit
DD
+
-
12-Bit PWM generator
V
I
CFW[2:0] bits
MCFR register
means that the current feedback has to be on the
MCCFI0 pin to be directly connected to the com-
parator and the OAP, OAN and OAZ (MCCFI1)
pins can be used to amplify another signal. Both
the OAZ(MCCFI1) and MCCFI0 pins can be con-
nected to an ADC entry. See
Note: The MCCFI0 pin is not available in LQFP32;
SDIP32 and LQFP44 devices. In this case, the
CFAV bit must be reset. The choice to use the Op-
amp or not is made with the OAON bit.
10.6.8.6 Measurement Window
In current mode, the measurement window fre-
quency can be programmed between 390Hz and
50KHz by the means of the SA[3:0] bits in the
MPRSR register.
Note: These frequencies are given for a 4 MHz
peripheral input frequency for a BLDC drive
(XT16, XT8 bits in MCONF register).
In sensorless mode this measurement window can
be used to detect BEMF zero crossing events. Its
width can be defined between 2.5μs and 40μs as a
minimum in sensorless mode by the OT[3:0] bits in
the MPWME register.
Filter
MCFR register
CFF[2:0] bits
D
CP
LEGEND:
(I): Current mode
(V): Voltage mode
CLI: Current limitation inter-
rupt
S
R
CLI
Q
Q
To Phase State
(Figure
Control
106).