ST7FMC1K2B3 STMICROELECTRONICS [STMicroelectronics], ST7FMC1K2B3 Datasheet - Page 143

• Manufacturer Part Number: ST7FMC1K2B3
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

MOTOR CONTROLLER (Cont’d)
All detections of Z
measurement window while the high side switch is
turned off. For this reason the PWM signal is ap-
plied on the high side switches.
When the high side switch is off, the high side
winding is tied to 0V by the free-wheeling diode,
Table 24. Step Configuration Summary
For a detailed description of the MTC registers,
see
10.6.4 Application Example: AC Induction
Motor Drive
Although the command sequence is rather differ-
ent between a PM BLDC and an AC three-phase
induction motor, the Motor Controller can be con-
figured to generate three-phase sinusoidal voltag-
es.
A timer with three independent PWM channels is
available for this purpose. Based on each of the
PWM reference signal, two complemented PWM
signals with deadtime are generated on the output
pins (6 in total), to drive directly an inverter with tri-
ple half bridge topology.
Section
10.6.13.
Voltage on measured point at the
PWM side selection to accelerate
Driver selection to accelerate de-
HDM-SDM bits in MCRB register
OO[5:0] bits in MPHST register
Configuration
IS[1:0] bits in MPHST register
CPB bit in MCRB register
n
start of demagnetization
Measurement done on:
events are done during a short
Back EMF shape
Current direction
demagnetization
magnetization
(ZVD bit = 0)
High side
Low side
Low Side High Side Low Side High Side Low Side High Side
001001
Falling
A to B
MCIC
T0
T3
0V
T3
Σ
10
10
0
1
the low side winding voltage is also held at 0V by
the low side ON switch and the complete BEMF
voltage is present on the third winding: detection is
then possible.
The variable voltage levels to be applied on the
motor terminals come from continuously varying
duty cycle, from one PWM period to the other (re-
fer to
generates a dedicated Update event (U event)
which:
– updates automatically the compare registers set-
– generates a dedicated U interrupt in which the
The shape of the output voltage (voltage, frequen-
cy, sinewave, trapezoid, ...) is completely man-
aged by the applicative software, in charge of
computing the compare values to be loaded for a
given PWM duty-cycle (refer to
100001
ting the duty cycle to avoid time critical issues
and ensure glitchless PWM operation.
values for the next coming update event are
loaded in compare preload registers.
A to C
Rising
MCIB
HV
T0
T5
01
11
T0
Σ
1
2
Figure 75
100100
Falling
B to C
MCIA
T2
T5
0V
T5
Σ
00
10
0
3
on
Step
page
000110
Rising
B to A
MCIC
HV
T2
ST7MC1xx/ST7MC2xx
Σ
T2
T1
10
11
1
4
144). The PWM counter
010010
Figure
Falling
C to A
MCIB
0V
T4
T1
01
10
T1
Σ
0
5
76).
011000
C to B
Rising
MCIA
143/309
HV
T4
T3
T4
Σ
00
11
1
6
1