W7100A WIZnet, W7100A Datasheet - Page 106

• Manufacturer Part Number: W7100A
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 255 B
• Data Ram Size: 64 KB
• On-chip Adc: No
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 80 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• Interface Type: UART
• Program Memory Type: Flash

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0xFE4726) first and lower byte(0xFE4027, 0xFE4127, 0xFE4227, 0xFE4327, 0xFE4427,
0xFE4527, 0xFE4627, 0xFE4727) later to get the correct value.
0x100n)][0x0000]
register, user should read the upper byte (0xFE4028, 0xFE4128, 0xFE4228, 0xFE4328,
0xFE4428, 0xFE4528, 0xFE4628, 0xFE4728) first and lower byte (0xFE4029, 0xFE4129,
0xFE4229, 0xFE4329, 0xFE4429, 0xFE4529, 0xFE4629, 0xFE4729) later to get the correct value.
calculated as follows: (Refer to the W7100A Driver code)
where it exceeds the RX memory upper-bound of the SOCKET while reading. In this case, read
the receiving data to the upper-bound, and change the physical address to the
RBUFBASEADDRESS(n). Next, read the rest of the receiving data.)
not increase more than the size of received data. So must check Sn_RX_RSR before receiving
process.) Finally, give RECV command to Sn_CR(SOCKET n Command Register).
+ 0x100n)][0x0000]
register, the user should read upper bytes (0xFE402A, 0xFE412A, 0xFE422A, 0xFE432A,
The total size of this value can be decided according to the value of RX Memory Size Register.
Sn_RX_RD (SOCKET n Read Pointer Register)[R/W][(0xFE4028 + 0x100n) – (0xFE4029 +
This register offers the location information to read the receiving data. When reading this
But this value itself is not the physical address to read. So, the physical address should be
Now, read the receiving data from src_ptr as large as the user wants. (* There may be a case
After that, be sure to increase the Sn_RX_RD value by the size of the reading data. (* Must
Refer to the pseudo code of the receiving part on TCP Server mode if the detail is needed.
Sn_RX_WR (SOCKET n RX Write Pointer Register)[R/W][(0xFE402A + 0x100n) – (0xFE402B
This register offers the location information to write the receive data. When reading this
1. SOCKET n RX Base Address (RBUFBASEADDRESS(n)) and SOCKET n RX Mask Address
2. The bitwise-AND operation of two values, Sn_RX_RD and RMASK(n) gives the result of
3. Two values src_mask and RBUFBASEADDRESS(n) are added together to give the result of
Ex) In case of 2048(0x0800) in S0_RX_RSR,
Ex) In case of 2048(0x0800) in S0_RX_RD,
(RMASK(n)) are calculated on Sn_RXMEM_SIZE(n) value.
the offset address (src_mask), in the RX memory range of the SOCKET.
the physical address(src_ptr).
0xFE4026
0x0428
0x08
0x08
0xFE4027
0x0429
0x00
0x00
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