W7100A WIZnet, W7100A Datasheet - Page 156

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W7100A

Manufacturer Part Number
W7100A
Description
8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
Manufacturer
WIZnet
Datasheet

Specifications of W7100A

Rohs
yes
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
255 B
Data Ram Size
64 KB
On-chip Adc
No
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 80 C
Package / Case
LQFP-100
Mounting Style
SMD/SMT
Interface Type
UART
Program Memory Type
Flash

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Part Number:
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© Copyright 2011 WIZnet Co., Inc. All rights reserved.
Document History Information
Copyright Notice
Copyright 2011 WIZnet, Inc. All Rights Reserved.
Technical Support:
Sales & Distribution:
For more information, visit our website at
Version
Ver.0.9 βeta
Ver.0.9.2
Ver.0.9.3
Ver.0.9.4
Ver.0.9.5
Ver.0.9.6
Ver.1.0
Ver.1.1
Ver.1.11
Ver.1.12
Date
Sep. 2009
Dec. 2009
Feb. 2010
Apr. 2010
May. 2010
Jan. 2011
Mar. 2011
May. 2011
May. 2011
May. 2011
U
support@wiznet.co.kr
U
sales@wiznet.co.kr
Descriptions
Release with W7100A launching
Delete about “How to program FLASH memory in W7100”
document
Section 2.4.7, “APP Entry RD/WR Enable” => “APP
Entry(0xFFF7 ~ 0xFFFF) RD/WR Enable”
Section 3 I/O Ports, Delete about tri-state signals in I/O pins
Modify the XTLP0 and XTLP1 explaination
Modify the Sn_IMR initial value 0x00 => 0xFF
Add the INTLEVEL register to TCPIPCore common register
Delete about PPPoE protocol cause of errata
Add new SFR definition, modify the GPIO in/out voltage,
delete the UIPR and UPORT register for W7100A
Remove information about external memory accessing
Added 64pin number information to “Pin Description” section
Define voltage of OSC (clock source) input, modify the
Package description of QFN 64
Modify the Pin Layout(nWR, nRD) and Add the External
Memory Interface to Pin Description
Add the Description details of GPIO Pin Description
Correct the GPIO pull-up, pull-down resistor value
U
U
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http://www.wiznet.co.kr
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Ver. 1.12
156

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