W7100A WIZnet, W7100A Datasheet - Page 28

• Manufacturer Part Number: W7100A
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 255 B
• Data Ram Size: 64 KB
• On-chip Adc: No
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 80 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• Interface Type: UART
• Program Memory Type: Flash

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jumps to start address of Code FLASH (0x0000). This flow is shown in Figure 2.3.
FLASH and APP Entry are still overlapped at the same address. Therefore, to use all FLASH
64KB, the APP Entry must be un-mapped from “Code Memory.” To un-map APP Entry, user
should set RB bit in WCONF(0xFF) to ‘0’ at the user startup code. Then the APP Entry is un-
mapped as shown below.
code. If using this method, the W7100A immediately disables the APP Entry address after its
system reset.
the embedded Code FLASH 64KB memory of the W7100A can be completely used as a code
memory.
2.1.1 Code Memory Wait States
fixed by the value stored in the WTST register. Please refer to the section 2.5.10 ‘New &
Extended SFR’ for more details.
If the APP Mode is selected, the Code FLASH 64KB can be used as a code memory. But both
When the Code FLASH takes more than 0xFFF7, the below code must be inserted into startup
Set the BOOTEN pin to ‘0’ and clear the RB bit of WCONF register at the startup code. Then
The wait states are managed by internal WTST(0x92) register. The number of wait states is
ANL
RB
7
0FFH,
ISPEN
6
Figure 2.4 Changing the code memory Status at RB = ‘0’
#07FH
EM2
5
; Clear Reboot flag
EM1
4
WCONF (0xFF)
EM0
3
Reserved
2
FB
1
Ver. 1.12
BE
0
Reset
0x00
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