W7100A WIZnet, W7100A Datasheet - Page 85

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W7100A

Manufacturer Part Number
W7100A
Description
8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
Manufacturer
WIZnet
Datasheet

Specifications of W7100A

Rohs
yes
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
255 B
Data Ram Size
64 KB
On-chip Adc
No
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 80 C
Package / Case
LQFP-100
Mounting Style
SMD/SMT
Interface Type
UART
Program Memory Type
Flash

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© Copyright 2011 WIZnet Co., Inc. All rights reserved.
long as any IR bit is set, the INT5(nINT5: TCPIPcore interrupt) signal is asserted low, and it
will not go high until all bits is cleared in the Interrupt Register.
CONFLICT
Bit
7
6
GAR (Gateway IP Address Register) [R/W] [0xFE0001 – 0xFE0004] [0x00]
This Register sets up the default gateway address.
SUBR (Subnet Mask Register) [R/W] [0xFE0005 – 0xFE0008] [0x00]
This register sets up the subnet mask address.
SHAR (Source Hardware Address Register) [R/W] [0xFE0009 – 0xFE000E] [0x00]
This register sets up the Source Hardware address.
SIPR (Source IP Address Register) [R/W] [0xFE000F – 0xFE0012] [0x00]
This register sets up the Source IP address.
IR (Interrupt Register) [R] [0xFE0015] [0x00]
This register is accessed by the MCU of W7100A to determine the cause of an interrupt. As
0xFE0009
7
CONFLICT
Ex) In case of “192.168.0.1”
Ex) In case of “255.255.255.0”
Ex) In case of “00.08.DC.01.02.03”
Ex) In case of “192.168.0.2”
UNREACH
0x00
Symbol
192 (0xC0)
192 (0xC0)
255 (0xFF)
0xFE0001
0xFE0005
0xFE000F
UNREACH
6
IP Conflict
When the ARP request has the same IP address as the Source IP address,
this bit is set as ‘1’. It can be cleared to ‘0’ by writing ‘1’ to this bit.
Destination unreachable
W7100A will receive ICMP(Destination Unreachable) packet if non-existing
0xFE000A
0x08
PPPoE
5
168 (0xA8)
168 (0xA8)
255 (0xFF)
0xFE0002
0xFE0006
0xFE0010
0xFE000B
0xDC
Reserved
4
Reserved
0xFE000C
Description
0x01
255 (0xFF)
0xFE0003
0xFE0007
0xFE0011
3
0 (0x00)
0 (0x00)
Reserved
2
0xFE000D
0x02
Reserved
0xFE0004
0xFE0008
0xFE0012
Ver. 1.12
1 (0x01)
0 (0x00)
2 (0x02)
1
0xFE000E
0x03
Reserved
0
85

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