W7100A WIZnet, W7100A Datasheet - Page 110

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W7100A

Manufacturer Part Number
W7100A
Description
8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
Manufacturer
WIZnet
Datasheet

Specifications of W7100A

Rohs
yes
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
255 B
Data Ram Size
64 KB
On-chip Adc
No
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 80 C
Package / Case
LQFP-100
Mounting Style
SMD/SMT
Interface Type
UART
Program Memory Type
Flash

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4) If user uses TCPIP Core interrupt, the INTLEVEL register must be set to the value more than
0x2B00
① Calculation formula of timer1
② Calculation formula of timer2
 STEP 2 : Setting Network Information
1. Basic network information setting for communication:
Ex) Set the INTLEVEL register to 0x2B00
IINCHIP_WRITE (INTLEVEL0, 0x2B);
IINCHIP_WRITE (INTLEVEL0 + 1,
ET1= 0;
TMOD = 0x20;
PCON |= 0x80;
TH1 = 0xFC;
TR1 = 1;
SCON = 0x50;
ES = 0;
RI = 0;
TI = 0;
timer of W7100A refers to the section 6.6 ‘Examples of Baud Rate Setting’.
The calculation of baud rate for the timer is as below
Ex) Using timer mode2, SMOD = 1, Clock speed = 88.4736MHz, Baud rate = 115200.
It must be set the basic network information.
① SHAR(Source Hardware Address Register)
② GAR(Gateway Address Register)
③ SUBR(Subnet Mask Register)
④ SIPR(Source IP Address Register)
because of internal TCPIP Core interrupt routine.
It is prescribed that the source hardware addresses, which is set by SHAR, use
unique hardware addresses (Ethernet MAC address) in the Ethernet MAC layer. The
IEEE manages the MAC address allocation. The manufacturer which produces the
network device allocates the MAC address to product.
Details on MAC address allocation refer to the website as below.
U
http://www.ieee.org/
TH1 = 256 – ((K * 88.4736MHz) / (384 * baud rate))
(RCAP2H, RCAP2L) = 65536 – (88.4736MHz / (32 * baud rate))
K = ‘1’ at SMOD = ‘0’, K = ‘2’ at SMOD = ‘1’
// Receive interrupt disable
// Transmit interrupt disable
// Serial MODE1, REN = 1, TI = 0, RI = 0
// SMOD = 1
// Serial interrupt disable
// TIMER MODE2
// Start the TIMER1
// Timer1 INT disable
// x2 115200(SMOD = 1) at 88.4736MHz
U
,
U
http://standards.ieee.org/regauth/oui/index.shtml
0x00);//write low byte of INTLEVEL TCPIPCore register
//write high byte of INTLEVEL TCPIPCore register
Ver. 1.12
U
110

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