W7100A WIZnet, W7100A Datasheet - Page 64

• Manufacturer Part Number: W7100A
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 255 B
• Data Ram Size: 64 KB
• On-chip Adc: No
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 80 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• Interface Type: UART
• Program Memory Type: Flash

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6.3
10 bits are transmitted in the following sequence: a start bit (always 0), 8 data bits (LSB first),
and a stop bit (always 1). During data reception, a start bit synchronizes the transmission.
Next, the 8 data bits can be accessed by reading SBUF, and the stop bit triggers the flag RB08
in SFR SCON (0x98). The baud rate is variable and dependent on Timer 1 or Timer 2 mode. To
enable Timer 2 clocking, set the TCLK and RCLK bits which are located in the T2CON (0xC8)
register.
6.4
CLK clock frequency, and 11 bits are transmitted or received in the following sequence: A
start bit (0), 8 data bits (LSB first), a programmable 9th bit, and a stop bit (1). The 9th bit
can be used to control the parity of the UART interface. During a transmission, the TB08 bit in
SCON is outputted as the 9
SCON.
The pin RXD serves as an input while TXD serves as an output for the serial communication.
This mode is almost identical to Mode1 except that the baud rate is fixed at 1/32 or 1/64 of
Clock Source
Figure 6.7 Timing Diagram for UART Transmission Mode0 (clk = 88.4736 MHz)
Mode1, 8-Bit UART, Variable Baud Rate, Timer 1 or 2
Mode2, 9-Bit UART, Fixed Baud Rate
Figure 6.8 Timing Diagram for UART Transmission Mode1
Figure 6.9 Timing Diagram for UART Transmission Mode2
th
bit. While receiving data, the 9
th
bit changes the RB08 bit in
Ver. 1.12
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