ATMEGA324P-A15MZ Atmel, ATMEGA324P-A15MZ Datasheet - Page 255

• Manufacturer Part Number: ATMEGA324P-A15MZ
• Description: MCU AVR 32KB FLASH 15MHZ 44-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA324P-A15MZ

• Package / Case: 44-VQFN Exposed Pad
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 32
• Eeprom Size: 1K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Program Memory Size: 32KB (32K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: I²C, SPI, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ATmega32 Boot
Loader Parameters
2503N–AVR–06/08
In
are given.
Table 99. Boot Size Configuration
Note:
Table 100. Read-While-Write Limit
Note:
Table 101. Explanation of Different Variables used in
pointer
Note:
BOOTSZ1
1
1
0
0
Section
Read-While-Write section (RWW)
No Read-While-Write section (NRWW)
Variable
PCMSB
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
Table 99
1. The different BOOTSZ Fuse configurations are shown in
1. For details about these two section, see
1. Z15: always ignored
245
Z0: should be zero for all SPM commands, byte select for the LPM instruction.
See
Z-pointer during Self-Programming.
through
BOOTSZ0
1
0
1
0
and
PC[13:6]
“Addressing the Flash during Self-Programming” on page 249
PC[5:0]
13
5
“RWW – Read-While-Write Section” on page 245
Table
Boot
Size
256
words
512
words
1024
words
2048
words
Corresponding
101, the parameters used in the description of the self programming
Z-value
Z14:Z7
Z6:Z1
Z14
Pages
4
8
16
32
Z6
(1)
(1)
(1)
Application
Flash
Section
$0000 -
$3EFF
$0000 -
$3DFF
$0000 -
$3BFF
$0000 -
$37FF
Program Counter page address: Page select,
Program Counter word address: Word select,
Description
Most significant bit in the Program Counter.
(The Program Counter is 14 bits PC[13:0])
Most significant bit which is used to address the
words within one page (64 words in a page
requires 6 bits PC [5:0]).
Bit in Z-register that is mapped to PCMSB.
Because Z0 is not used, the ZPCMSB equals
PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB.
Because Z0 is not used, the ZPAGEMSB
equals PAGEMSB + 1.
for page erase and page write
for filling temporary buffer (must be zero during
page write operation)
“NRWW – No Read-While-Write Section” on page
Boot
Loader
Flash
Section
$3F00 -
$3FFF
$3E00 -
$3FFF
$3C00 -
$3FFF
$3800 -
$3FFF
Pages
Figure 126
224
32
End
Application
section
$3EFF
$3DFF
$3BFF
$37FF
Figure 125
Address
$0000 - $37FF
$3800 - $3FFF
and the Mapping to the Z-
ATmega32(L)
for details about the use of
Boot Reset
Address
(start Boot
Loader
Section)
$3F00
$3E00
$3C00
$3800
255