ATMEGA324P-A15MZ Atmel, ATMEGA324P-A15MZ Datasheet - Page 257
ATMEGA324P-A15MZ
Manufacturer Part Number
ATMEGA324P-A15MZ
Description
MCU AVR 32KB FLASH 15MHZ 44-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA324P-A15MZ.pdf
(346 pages)
Specifications of ATMEGA324P-A15MZ
Package / Case
44-VQFN Exposed Pad
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
32
Eeprom Size
1K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
2K x 8
Program Memory Size
32KB (32K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
I²C, SPI, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Fuse Bits
2503N–AVR–06/08
Table 103. Lock Bit Protection Modes (Continued)
Notes:
The ATmega32 has two fuse bytes.
all the fuses and how they are mapped into the fuse bytes. Note that the fuses are read as logi-
cal zero, “0”, if they are programmed.
Table 104. Fuse High Byte
Notes:
Fuse High
Byte
OCDEN
JTAGEN
SPIEN
CKOPT
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
1
2
3
4
Memory Lock Bits
(1)
1. Program the fuse bits before programming the Lock bits.
2. “1” means unprogrammed, “0” means programmed
1. The SPIEN Fuse is not accessible in SPI Serial Programming mode.
2. The CKOPT Fuse functionality depends on the setting of the CKSEL bits. See
3. The default value of BOOTSZ1..0 results in maximum Boot Size. See
4. Never ship a product with the OCDEN Fuse programmed regardless of the setting of Lock bits
5. If the JTAG interface is left unconnected, the JTAGEN fuse should if possible be disabled. This
(2)
(4)
(5)
Sources” on page 25.
and the JTAGEN Fuse. A programmed OCDEN Fuse enables some parts of the clock system
to be running in all sleep modes. This may increase the power consumption.
to avoid static current at the TDO pin in the JTAG interface.
No.
Bit
7
6
5
4
3
2
1
0
1
1
0
0
Description
Enable OCD
Enable JTAG
Enable SPI Serial Program and
Data Downloading
Oscillator options
EEPROM memory is preserved
through the Chip Erase
Select Boot Size (see
for details)
Select Boot Size (see
for details)
Select reset vector
(2)
1
0
0
1
for details.
Protection Type
No restrictions for SPM or LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section,
and LPM executing from the Application section is not
allowed to read from the Boot Loader section. If interrupt
vectors are placed in the Application section, interrupts
are disabled while executing from the Boot Loader section.
LPM executing from the Application section is not allowed
to read from the Boot Loader section. If interrupt vectors
are placed in the Application section, interrupts are
disabled while executing from the Boot Loader section.
Table 104
Table 99
Table 99
and
Table 105
Default Value
1 (unprogrammed, OCD disabled)
0 (programmed, JTAG enabled)
0 (programmed, SPI prog. enabled)
1 (unprogrammed)
1 (unprogrammed, EEPROM not
preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed)
describe briefly the functionality of
(3)
(3)
ATmega32(L)
Table 99 on page
See “Clock
255.
257
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