ATMEGA324P-A15MZ Atmel, ATMEGA324P-A15MZ Datasheet - Page 82

• Manufacturer Part Number: ATMEGA324P-A15MZ
• Description: MCU AVR 32KB FLASH 15MHZ 44-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA324P-A15MZ

• Package / Case: 44-VQFN Exposed Pad
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 32
• Eeprom Size: 1K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Program Memory Size: 32KB (32K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: I²C, SPI, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timer/Counter
Register – TCNT0
Output Compare
Register – OCR0
Timer/Counter
Interrupt Mask
Register – TIMSK
82
ATmega32(L)
• Bit 2:0 – CS02:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter.
Table 42. Clock Select Bit Description
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the compare
match on the following timer clock. Modifying the counter (TCNT0) while the counter is running,
introduces a risk of missing a compare match between TCNT0 and the OCR0 Register.
The Output Compare Register contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an output compare interrupt, or to
generate a waveform output on the OC0 pin.
• Bit 1 – OCIE0: Timer/Counter0 Output Compare Match Interrupt Enable
When the OCIE0 bit is written to one, and the I-bit in the Status Register is set (one), the
Timer/Counter0 Compare Match interrupt is enabled. The corresponding interrupt is executed if
a compare match in Timer/Counter0 occurs, i.e., when the OCF0 bit is set in the Timer/Counter
Interrupt Flag Register – TIFR.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
CS02
0
0
0
0
1
1
1
1
CS01
0
0
1
1
0
0
1
1
OCIE2
R/W
R/W
R/W
7
0
7
0
7
0
CS00
0
1
0
1
0
1
0
1
TOIE2
R/W
R/W
R/W
6
0
6
0
6
0
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
External clock source on T0 pin. Clock on falling edge.
External clock source on T0 pin. Clock on rising edge.
TICIE1
R/W
R/W
R/W
I/O
I/O
I/O
I/O
I/O
5
0
5
0
5
0
/(No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
OCIE1A
R/W
R/W
R/W
4
0
4
0
4
0
TCNT0[7:0]
OCR0[7:0]
OCIE1B
R/W
R/W
R/W
3
0
3
0
3
0
TOIE1
R/W
R/W
R/W
2
0
2
0
2
0
OCIE0
R/W
R/W
R/W
1
0
1
0
1
0
TOIE0
R/W
R/W
R/W
0
0
0
0
0
0
TCNT0
OCR0
TIMSK
2503N–AVR–06/08