D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 269

• Manufacturer Part Number: D13007VX13V
• Description: MCU 3V 0K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of D13007VX13V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Each interrupt is enabled or disabled by the DTIE bit in the corresponding data transfer control
register (DTCR). Separate interrupt signals are sent to the interrupt controller.
The interrupt priority order among channels is channel 0 > channel 1 and channel A > channel B.
Figure 7.25 shows the DMA-end interrupt logic. An interrupt is requested whenever DTE = 0 and
DTIE = 1.
The DMA-end interrupt for the B channels (DENDB) is unavailable in full address mode. The
DTME bit does not affect interrupt operations.
7.6
7.6.1
Word data cannot be accessed starting at an odd address. When word-size transfer is selected, set
even values in the memory and I/O address registers (MAR and IOAR).
7.6.2
The DMAC itself cannot be accessed during a DMAC cycle. DMAC registers cannot be specified
as source or destination addresses.
Usage Notes
Note on Word Data Transfer
DMAC Self-Access
DTIE
DTE
Figure 7.25 DMA-End Interrupt Logic
Rev.5.00 Sep. 12, 2007 Page 239 of 764
DMA-end interrupt
7. DMA Controller
REJ09B0396-0500