D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 582

MCU 3V 0K 100-TQFP

D13007VX13V

Manufacturer Part Number
D13007VX13V
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of D13007VX13V

Core Processor
H8/300H
Core Size
16-Bit
Speed
13MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
18. Clock Pulse Generator
18.3
When the oscillator frequency is 5 MHz or higher, the duty adjustment circuit adjusts the duty
cycle of the clock signal from the oscillator to generate φ.
18.4
The prescalers divide the system clock (φ) to generate internal clocks (φ/2 to φ/4096).
18.5
The frequency divider divides the duty-adjusted clock signal to generate the system clock (φ). The
frequency division ratio can be changed dynamically by modifying the value in DIVCR, as
described below. Power consumption in the chip is reduced in almost direct proportion to the
frequency division ratio. The system clock generated by the frequency divider can be output at the
φ pin.
Rev.5.00 Sep. 12, 2007 Page 552 of 764
REJ09B0396-0500
V
STBY
EXTAL
φ (internal or
external)
RES
Note: * t
CC
Duty Adjustment Circuit
Prescalers
Frequency Divider
DEXT
V
IH
includes a 10 t
Figure 18.7 External Clock Output Settling Delay Timing
cyc
RES pulse width (t
t
DEXT
*
RESW
).

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