D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 93
D13007VX13V
Manufacturer Part Number
D13007VX13V
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of D13007VX13V
Core Processor
H8/300H
Core Size
16-Bit
Speed
13MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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Bit 1⎯Software Standby Output Port Enable (SSOE): Specifies whether the address bus and
bus control signals (CS
outputs or fixed high, or placed in the high-impedance state in software standby mode.
Bit 1
SSOE
0
1
Bit 0⎯RAM Enable (RAME): Enables or disables the on-chip RAM. The RAME bit is
initialized by the rising edge of the RES signal. It is not initialized in software standby mode.
Bit 0
RAME
0
1
3.4
3.4.1
A maximum 1-Mbyte address space can be accessed. The initial bus mode after a reset is 8 bits,
with 8-bit access to all areas. If at least one area is designated for 16-bit access in ABWCR, the
bus mode switches to 16 bits.
3.4.2
A maximum 1-Mbyte address space can be accessed. The initial bus mode after a reset is 16 bits,
with 16-bit access to all areas. If all areas are designated for 8-bit access in ABWCR, the bus
mode switches to 8 bits.
Operating Mode Descriptions
Mode 1
Mode 2
Description
In software standby mode, the address bus and bus control signals are all high-
impedance
In software standby mode, the address bus retains its output state and bus control
signals are fixed high
Description
On-chip RAM is disabled
On-chip RAM is enabled
0
to CS
7
, AS, RD, HWR, LWR, UCAS, LCAS, and RFSH) are kept as
Rev.5.00 Sep. 12, 2007 Page 63 of 764
3. MCU Operating Modes
REJ09B0396-0500
(Initial value)
(Initial value)
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