D13007VX13V Renesas Electronics America, D13007VX13V Datasheet - Page 349
D13007VX13V
Manufacturer Part Number
D13007VX13V
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of D13007VX13V
Core Processor
H8/300H
Core Size
16-Bit
Speed
13MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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• Free-running and periodic counter operation
When a channel is set to have its counter cleared by compare match, in that channel 16TCNT
operates as a periodic counter. Select the output compare function of GRA or GRB, set bit CCLR1
or CCLR0 in 16TCR to have the counter cleared by compare match, and set the count period in
GRA or GRB. After these settings, the counter starts counting up as a periodic counter when the
corresponding bit is set to 1 in TSTR. When the count matches GRA or GRB, the IMFA or IMFB
flag is set to 1 in TISRA/TISRB and the counter is cleared to H'0000. If the corresponding IMIEA
or IMIEB bit is set to 1 in TISRA/TISRB, a CPU interrupt is requested at this time. After the
compare match, 16TCNT continues counting up from H'0000. Figure 9.14 illustrates periodic
counting.
A reset leaves the counters (16TCNTs) in 16-bit timer channels 0 to 2 all set as free-running
counters. A free-running counter starts counting up when the corresponding bit in TSTR is set
to 1. When the count overflows from H'FFFF to H'0000, the OVF flag is set to 1 in TISRC.
After the overflow, the counter continues counting up from H'0000. Figure 9.13 illustrates
free-running counting.
H'FFFF
H'0000
STR0 to
STR2 bit
OVF
16TCNT value
Figure 9.13 Free-Running Counter Operation
Rev.5.00 Sep. 12, 2007 Page 319 of 764
REJ09B0396-0500
9. 16-Bit Timer
Time
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