R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 183

MCU 24KB FLASH 384K 144-LQFP

R5F61662N50FPV

Manufacturer Part Number
R5F61662N50FPV
Description
MCU 24KB FLASH 384K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61662N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61662N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
4. The valid range of break addresses in the MCU and CPU address modes is given in table 7.3.
Table 7.3
5. If an illegal instruction is executed after setting break conditions for the UBC, an unexpected
PC break address
CKS
Register read
The value read as 1
is retained
Register write
Flag bit
 MCU operating mode/CPU mode and valid address range
UBC break interrupt may occur depending on the value of the program counter and the internal
bus cycle.
In setting break addresses, MCU address mode and CPU mode need to be taken into
account as shown below.
The mask must be set in the address mask register.
Valid Range of Break/Branch Addresses for MCU/CPU Address Modes
Figure 7.3 Flag Bit Clearing Sequence (Condition Match Flag)
Flag bit is set to 1
256 MB
The lower 24 bits are valid and the upper 8 bits are masked.
Advanced Mode
Rev. 2.00 Sep. 16, 2009 Page 153 of 1036
Section 7 User Break Controller (UBC)
16 MB
Flag bit is cleared to 0
REJ09B0414-0200

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