R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 720

• Manufacturer Part Number: R5F61662N50FPV
• Description: MCU 24KB FLASH 384K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61662N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 17 I
17.3.4
ICIER enables or disables interrupt sources and the acknowledge bits, sets the acknowledge bits to
be transferred, and confirms the acknowledge bit to be received.
Rev. 2.00 Sep. 16, 2009 Page 690 of 1036
REJ09B0414-0200
Bit
7
6
5
Bit
Bit Name
Initial Value
R/W
I
2
Bit Name
TIE
TEIE
RIE
2
C Bus Interrupt Enable Register (ICIER)
C Bus Interface 2 (IIC2)
R/W
TIE
7
0
Initial
Value
0
0
0
TEIE
R/W
6
0
R/W
R/W
R/W
R/W
R/W
RIE
5
0
Description
Transmit Interrupt Enable
When the TDRE bit in ICSR is set to 1, this bit enables
or disables the transmit data empty interrupt (TXI)
request.
0: Transmit data empty interrupt (TXI) request is
1: Transmit data empty interrupt (TXI) request is
Transmit End Interrupt Enable
This bit enables or disables the transmit end interrupt
(TEI) request at the rising of the ninth clock while the
TDRE bit in ICSR is set to 1. The TEI request can be
canceled by clearing the TEND bit or the TEIE bit to 0.
0: Transmit end interrupt (TEI) request is disabled
1: Transmit end interrupt (TEI) request is enabled
Receive Interrupt Enable
This bit enables or disables the receive full interrupt
(RXI) request when receive data is transferred from
ICDRS to ICDRR and the RDRF bit in ICSR is set to 1.
The RXI request can be canceled by clearing the
RDRF or RIE bit to 0.
0: Receive data full interrupt (RXI) request is disabled
1: Receive data full interrupt (RXI) request is enabled
disabled
enabled
NAKIE
R/W
4
0
STIE
R/W
3
0
ACKE
R/W
2
0
ACKBR
R
1
0
ACKBT
R/W
0
0