R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 445
![MCU 24KB FLASH 384K 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61662N50FPV
Manufacturer Part Number
R5F61662N50FPV
Description
MCU 24KB FLASH 384K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R0K561622S000BE.pdf
(1070 pages)
Specifications of R5F61662N50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61662N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 445 of 1070
- Download datasheet (6Mb)
(2)
The pin function is switched as shown below according to the combination of the operating mode,
EXPE bit, port function control register (PFCR), and PF3DDR bit settings.
Note:
(3)
The pin function is switched as shown below according to the combination of the operating mode,
EXPE bit, port function control register (PFCR), and PF2DDR bit settings.
Note:
MCU
Operating Mode
On-chip ROM
disabled extended
mode
Modes other than
on-chip ROM
disabled extended
mode
MCU
Operating Mode
On-chip ROM
disabled extended
mode
Modes other than
on-chip ROM
disabled extended
mode
PF3/A19
PF2/A18
*
*
Valid in external extended mode (EXPE = 1)
Valid in external extended mode (EXPE = 1)
Module Name
Bus controller
Bus controller
I/O port
Module Name
Bus controller
Bus controller
I/O port
Pin Function
A19 output
A19 output*
PF3 output
PF3 input
(initial value)
Pin Function
A18 output
A18 output*
PF2 output
PF2 input
(initial value)
I/O Port
A19_OE
1
0
0
I/O Port
A18_OE
1
0
0
Rev. 2.00 Sep. 16, 2009 Page 415 of 1036
Setting
Setting
I/O Port
PF3DDR
1
0
I/O Port
PF2DDR
1
0
Section 11 I/O Ports
REJ09B0414-0200
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