R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 912

MCU 24KB FLASH 384K 144-LQFP

R5F61662N50FPV

Manufacturer Part Number
R5F61662N50FPV
Description
MCU 24KB FLASH 384K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61662N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61662N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 24 Power-Down Modes
Table 24.1 States of Operation
Notes:
Rev. 2.00 Sep. 16, 2009 Page 882 of 1036
REJ09B0414-0200
State of
Operation
Transition
condition
Cancellation
method
Oscillator
CPU
On-chip RAM
Watchdog timer Operating
8-bit timer
(unit 0/1)
Other
peripheral
modules
I/O ports
1. SCI and Σ∆ A/D converter enters the reset state, and other peripheral modules retain
2. External interrupt and some internal interrupts (8-bit timer and watchdog timer).
3. All peripheral modules enter the reset state.
4. "Functioning" or "Halted" is selectable through the setting of bits MSTPA11 to MSTPA8
5. "Retained" or "undefined" of the contents of RAM is selected by the setting of the bits
6. Retention or high-impedance for the address bus and bus-control signals (CS0 to CS7,
7. Some peripheral modules enter a state where the register values are retained.
"Halted (retained)" in the table means that the internal values are retained and internal
operations are suspended.
"Halted (undefined)" in the table means that the internal values are undefined and the
power supply for internal operations is turned off.
their states.
in MSTPCRA.
RAMCUT2 to RAMCUT0 in DPSBYCR.
AS, RD, HWR, and LWR) is selected by the setting of the OPE bit in SBYCR.
Sleep Mode
Control register
+ instruction
Interrupt
Operating
Halted
(retained)
Operating
(retained)
Operating
Operating
Operating
All-Module-
Clock-Stop
Mode
Control register
+ instruction
Interrupt*
Operating
Halted
(retained)
Halted
(retained)
Operating*
Halted*
Retained
Operating
1
2
4
Software
Standby Mode
Control register
+ instruction
External
interrupt
Halted
Halted
(retained)
Halted
(retained)
Halted
(retained)
Halted
(retained)
Halted*
Retained*
1
6
Deep
Software
Standby
Mode
Control
register +
instruction
External
interrupt
Halted
Halted
(undefined)
Halted
(retained/
undefined)*
Halted
(undefined)
Halted
(undefined)
Halted*
(undefined)
Halted*
7
6
5
Hardware
Standby
Mode
Pin input
Halted
Halted
(undefined)
Halted
(undefined)
Halted
(undefined)
Halted
(undefined)
Halted*
(undefined)
Hi-Z
3

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