HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 335

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

13.3.6
The interrupt request flag (IRIC) is set at different times depending on the WAIT bit in ICMR and
ACK bit in ICCR. SCL is automatically held low after one frame has been transferred; this timing
is synchronized with the internal clock. Figure 13.10 shows the IRIC set timing and SCL control.
(a) When WAIT = 0 and ACK = 0
(b) When WAIT = 1 and ACK = 0
(c) When ACK = 1
IRIC Set Timing and SCL Control
SCL
SDA
IRIC
User processing
Note: The ICDR write (transmit) or read (receive) following the clearing of IRIC
SCL
SDA
IRIC
User processing
SCL
SDA
IRIC
User processing
should be executed after the rise of SCL (ninth clock pulse).
7
7
7
Figure 13.10 IRIC Set Timing and SCL Control
8
8
8
Clear IRIC
Clear IRIC
Clear IRIC
A
A
Write to ICDR (transmit)
or read ICDR (receive)
Write to ICDR (transmit)
or read ICDR (receive)
Write to ICDR (transmit)
or read ICDR (receive)
1
1
1
303