HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 499

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HD64F3337YCP16

Manufacturer Part Number
HD64F3337YCP16
Description
IC H8 MCU FLASH 60K 84PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheets

Specifications of HD64F3337YCP16

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
Package
84PLCC
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
74
Interface Type
HIF/I2C/SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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HANTEI:
BRER:
;———< Block address table used in erase-verify> ———
ERVADR:
EOWARI:
ABEND2:
Loop Counter Values in Programs and Watchdog Timer Overflow Interval Settings: The
setting of #a, #b, #c, #d, and #e values in the programs depends on the clock frequency. Tables
20.9 (1) and (2) indicate sample loop counter settings for typical clock frequencies. However, #e is
set according to table 20.10.
As a software loop is used, calculated values including percent errors may not be the same as
actual values. Therefore, the values are set so that the total programming time and total erase time
do not exceed 1 ms and 30 s, respectively.
The maximum number of writes in the program, N, is set to 6.
BCLR
MOV.W
BEQ
MOV.W
CMP.W
BPL
ADD.W
MOV.W
CMP.W
BNE
BRA
.ALIGN
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
.DATA.W
Erase end
Erase error
#3,
R0,
EOWARI
#H'0004,
R4
BRER
R5
#H'025A,
R4,
ERASE1
ABEND2
2
H'0000
H'0080
H'0100
H'0180
H'0200
H'0400
H'0800
H'0C00
H'1000
H'2000
H'4000
H'6000
H'8000
H'A000
H'C000
H'EF80
H'F780
@FLMCR:8
@EBR1
R4
R6
R5
R4
R6
;
; If EBR1/EBR2 is all 0, erasing ended normally
;
; Erase-verify fail count executed 4 times?
; If R6
; If R6 < 4, Erase time
;
; Erase-verify executed 602 times?
; If erase-verify not executed 602 times, erase again
; If erase-verify executed 602 times, branch to ABEND2
; SB0
; SB1
; SB2
; SB3
; SB4
; SB5
; SB6
; SB7
; LB0
; LB1
; LB2
; LB3
; LB4
; LB5
; LB6
; LB7
; FLASH END
;
4, branch to BRER (branch until R6 is 4 to 602)
Clear EV bit
2 (execute when R6 is 1, 2, or 3)
467

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