HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 462

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HD64F3337YCP16

Manufacturer Part Number
HD64F3337YCP16
Description
IC H8 MCU FLASH 60K 84PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheets

Specifications of HD64F3337YCP16

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
Package
84PLCC
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
74
Interface Type
HIF/I2C/SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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(7) Design a current margin into the programming voltage (V
) power supply. Ensure that
PP
V
will not depart from 12.0 0.6 V (11.4 V to 12.6 V) during programming or erasing.
PP
Programming and erasing may become impossible outside this range.
(8) Ensure that peak overshoot does not exceed the rated value at the FV
and MD
pins.
PP
1
Connect decoupling capacitors as close to the FV
and MD
pins as possible.
PP
1
Also connect decoupling capacitors to the MD
pin in the same way when boot mode is uesd.
1
FV
12 V
PP
H8/3334YF
1.0 F
0.01 F
Figure 19.21 V
Power Supply Circuit Design (Example)
PP
(9) Use the recommended algorithms for programming and erasing flash memory. These
algorithms are designed to program and erase without subjecting the device to voltage stress and
without sacrificing the reliability of programmed data.
Before setting the program (P) or erase (E) bit in the flash memory control register (FLMCR), set
the watchdog timer to ensure that the P or E bit does not remain set for more than the specified
time.
(10) For details on interrupt handling while flash memory is being programmed or erased,
see the notes on NMI interrupt handling in section 19.4.9, Interrupt Handling during Flash
Memory Programming and Erasing.
430

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